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MC74LVX573 Datasheet, PDF (4/8 Pages) Motorola, Inc – LOW-VOLTAGE CMOS | |||
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MC74LVX573
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ CAPACITIVE CHARACTERISTICS
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ Symbol
Parameter
TA = 25°C
TA = â 40 to 85°C
Min Typ Max Min
Max
Unit
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ Cin InputCapacitance
4 10
10
pF
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ Cout Maximum 3âState Output Capacitance
6
pF
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ CPD Power Dissipation Capacitance (Note 2)
29
pF
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ 2. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC / 8 (per latch). CPD is used to determine the
noâload dynamic power consumption; PD = CPD VCC2 fin + ICC VCC.
NOISE CHARACTERISTICS (Input tr = tf = 3.0 ns, CL = 50 pF, VCC = 3.3 V, Measured in SOIC Package)
TA = 25°C
Symbol
Characteristic
Typ
Max
Unit
VOLP Quiet Output Maximum Dynamic VOL
0.5
0.8
V
VOLV Quiet Output Minimum Dynamic VOL
â0.5
â0.8
V
VIHD Minimum High Level Dynamic Input Voltage
2.0
V
VILD Maximum Low Level Dynamic Input Voltage
0.8
V
TIMING REQUIREMENTS (Input tr = tf = 3.0 ns)
Symbol
Parameter
tw(h) Minimum Pulse Width, LE
tsu
Minimum Setup Time, D to LE
th
Minimum Hold Time, D to LE
Test Conditions
VCC = 2.7 V
VCC = 3.3 ± 0.3 V
VCC = 2.7 V
VCC = 3.3 ± 0.3 V
VCC = 2.7 V
VCC = 3.3 ± 0.3 V
TA = 25°C
TA = â 40 to 85°C
Typ Limit
Limit
Unit
6.5
7.5
ns
5.0
5.0
5.0
5.0
ns
3.5
3.5
1.5
1.5
ns
1.5
1.5
ORDERING INFORMATION
Device
Package
Shippingâ
MC74LVX573DWR2
SOICâ20
1000 / Tape & Reel
MC74LVX573DWR2G
SOICâ20
(PbâFree)
1000 / Tape & Reel
MC74LVX573DT
TSSOPâ20*
75 Units / Rail
MC74LVX573DTR2
TSSOPâ20*
2500 / Tape & Reel
MC74LVX573M
SOEIAJâ20
50 Units / Rail
MC74LVX573MG
SOEIAJâ20
(PbâFree)
50 Units / Rail
MC74LVX573MEL
SOEIAJâ20
2000 / Tape & Reel
MC74LVX573MELG
SOEIAJâ20
(PbâFree)
2000 / Tape & Reel
â For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*This package is inherently PbâFree.
http://onsemi.com
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