MC74HCT241A Datasheet, PDF (4/9 Pages) ON Semiconductor – Octal 3-State Noninverting Buffer/Line Driver/ Line Receiver with LSTTL-Compatible Inputs

MC74HCT241A
AC ELECTRICAL CHARACTERISTICS (V_CC = 5.0 V ± 10%, C_L = 50 pF, Input t_r = t_f = 6 ns)
Guaranteed Limit
Symbol
Parameter
– 55 to
25_C
v 85_C v 125_C Unit
t_PLH,
t_PHL
Maximum Propagation Delay, A to YA or B to YB
(Figures 1 and 3)
23
29
35
ns
t_PLZ,
t_PHZ
Maximum Propagation Delay, Output Enable to YA or YB
(Figures 2 and 4)
30
38
45
ns
t_PZL,
t_PZH
Maximum Propagation Delay, Output Enable to YA or YB
(Figures 2 and 4)
26
33
39
ns
t_TLH,
t_THL
Maximum Output Transition Time, Any Output
(Figures 1 and 3)
12
15
18
ns
C_in
Maximum Input Capacitance
10
10
10
pF
C_out
Maximum Three−State Output Capacitance (Output in High−Impedance
15
15
15
pF
State)
Typical @ 25°C, V_CC = 5.0 V
C_PD
Power Dissipation Capacitance (Per Enabled Output)*
55
pF
* Used to determine the no−load dynamic power consumption: P_D = C_PD V_CC2f + I_CC V_CC.
t_r
INPUT
A OR B
t_PLH
OUTPUT
YA OR YB
2.7 V
1.3 V
0.3 V
90%
1.3 V
10%
t_TLH
Figure 1.
SWITCHING WAVEFORMS
ENABLE A
1.3 V
t_f
3V
GND
t_PHL
t_THL
ENABLE B
OUTPUT Y
OUTPUT Y
1.3 V
t_PZL
t_PLZ
1.3 V
t_PZH
t_PHZ
1.3 V
Figure 2.
3V
GND
3V
GND
HIGH
IMPEDANCE
10% _VOL
90% VOH
HIGH
IMPEDANCE
DEVICE
UNDER
TEST
TEST POINT
OUTPUT
C_L*
DEVICE
UNDER
TEST
TEST POINT
OUTPUT
1 kΩ
C_L*
CONNECT TO V_CC WHEN
TESTING t_PLZ AND t_PZL.
CONNECT TO GND WHEN
TESTING t_PHZ AND t_PZH.
*Includes all probe and jig capacitance
Figure 3. Test Circuit
*Includes all probe and jig capacitance
Figure 4. Test Circuit
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