MC74HC175A_12 Datasheet, PDF (4/11 Pages) ON Semiconductor – Quad D Flip-Flop with Common Clock and Reset

MC74HC175A
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _Symbol
Parameter
V_CC
Test Conditions
V
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{VOL Maximum Low−Level Output}
V_in = V_IH or V_IL
2.0
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _Voltage
|I_out| v 20 mA
4.5
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ 6.0
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Vin = VIH or VIL |Iout| v 2.4 mA 3.0
|I_out| v 4.0 mA 4.5
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{|Iout|v5.2mA 6.0}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _Iin
Maximum Input Leakage Current V_in = V_CC or GND
6.0
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{ICC MaximumQuiescent Supply}
V_in = V_CC or GND
6.0
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ^{Current (per Package)}
I_out = 0 mA
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6 ns)}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _VCC
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _Symbol
Parameter
V
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{fmax Maximum Clock Frequency (50% Duty Cycle)}
2.0
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ^{(Figures 1 and 4)}
3.0
4.5
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _6.0
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{tPLH, Maximum Propagation Delay, Clock to Q or Q}
2.0
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ^tPHL
(Figures 1 and 4)
3.0
4.5
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _6.0
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{tPHL Maximum Propagation Delay, Reset to Q or Q}
2.0
(Figures 2 and 4)
3.0
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _4.5
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _6.0
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{tTLH, Maximum Output Transition Time, Any Output}
2.0
t_THL
(Figures 1 and 4)
3.0
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _4.5
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ 6.0
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ C_in MaximumInputCapacitance
—
Guaranteed Limit
– 55 to
25_C v 85_C v 125_C _Unit
0.1
0.1
0.1
V
0.1
0.1
0.1
0.1
0.1
0.1
0.26
0.33
0.40
0.26
0.33
0.40
0.26
0.33
0.40
± 0.1
± 1.0
± 1.0
mA
4
40
160
mA
Guaranteed Limit
– 55 to
25_C
v 85_C v 125_C
6
4.8
4
10
8.0
6
30
24
20
35
28
24
150
190
225
75
90
110
26
32
38
22
28
33
125
155
190
70
85
110
22
27
34
19
24
30
75
95
110
27
32
36
15
19
22
13
16
19
10
10
10
Unit
MHz
ns
ns
ns
pF
Typical @ 25°C, V_CC = 5.0 V
C_PD Power Dissipation Capacitance (Per Flip−Flop)*
35
pF
* Used to determine the no−load dynamic power consumption: P_D = C_PD V_CC2f + I_CC V_CC.
http://onsemi.com
4