MC74HC175A_12 Datasheet, PDF (2/11 Pages) ON Semiconductor – Quad D Flip-Flop with Common Clock and Reset

RESET 1
Q0 2
Q0 3
D0 4
D1 5
Q1 6
Q1 7
GND 8
16 V_CC
15 Q3
14 Q3
13 D3
12 D2
11 Q2
10 Q2
9 CLOCK
Figure 1. Pin Assignment
FUNCTION TABLE
Inputs
Reset Clock D
L
XX
H
H
H
L
H
LX
Outputs
QQ
LH
HL
LH
No Change
MC74HC175A
CLOCK ⁹
DATA
INPUTS
D0 ⁴
D1 ⁵
D2 ¹²
D3 ¹³
2 _Q0
3 _Q0
7 _Q1
6 _Q1
10 _Q2
11 _Q2
15 _Q3
14 _Q3
RESET ¹
PIN 16 = V_CC
PIN 8 = GND
Figure 2. Logic Diagram
INVERTING
AND
NONINVERTING
OUTPUTS
ORDERING INFORMATION
Device
Package
Shipping^†
MC74HC175ANG
PDIP−16
500 Units / Rail
MC74HC175ADG
SOIC−16
(Pb−Free)
48 Units / Rail
MC74HC175ADR2G
SOIC−16
(Pb−Free)
2500 / Tape & Reel
MC74HC175ADTR2G
TSSOP−16
(Pb−Free)
2500 / Tape & Reel
NLV74HC175ADTR2G*
TSSOP−16
(Pb−Free)
2500 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP
Capable
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