MC14518B Datasheet, PDF (4/8 Pages) ON Semiconductor – Dual Up Counters

MC14518B
ÎÎSÎÎWIÎÎTCHÎÎINGÎÎCHÎÎARÎÎACTÎÎERÎÎISTÎÎICSÎÎ^(7.)ÎÎ(C_L =ÎÎ50ÎÎpF,ÎÎT_A=ÎÎ25_ÎÎC) ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ_AlÎÎ_{l Typ}ÎÎ_esÎÎÎÎÎÎÎÎÎÎÎÎ
Characteristic
Output Rise and Fall Time
t_TLH, t_THL = (1.5 ns/pF) C_L + 25 ns
t_TLH, t_THL = (0.75 ns/pF) C_L + 12.5 ns
t_TLH, t_THL = (0.55 ns/pF) C_L + 9.5 ns
Propagation Delay Time
Clock to Q/Enable to Q
t_PLH, t_PHL = (1.7 ns/pF) C_L + 215 ns
t_PLH, t_PHL = (0.66 ns/pF) C_L + 97 ns
t_PLH, t_PHL = (0.5 ns/pF) C_L + 75 ns
Symbol
t_TLH,
t_THL
t_PLH,
t_PHL
V_DD
5.0
10
15
5.0
10
15
Min
Typ ^(8.)
Max
Unit
ns
—
100
200
—
50
100
—
40
80
ns
—
280
560
—
115
230
—
80
160
Reset to Q
t_PHL = (1.7 ns/pF) C_L + 265 ns
t_PHL = (0.66 ns/pF) C_L + 117 ns
t_PHL = (0.66 ns/pF) C_L + 95 ns
Clock Pulse Width
t_PHL
t_w(H)
t_w(L)
ns
5.0
—
330
650
10
—
130
230
15
—
90
170
5.0
200
100
10
100
50
15
70
35
—
ns
—
—
Clock Pulse Frequency
f_cl
5.0
—
2.5
1.5
MHz
10
—
6.0
3.0
15
—
8.0
4.0
Clock or Enable Rise and Fall Time
t_THL, t_TLH
5.0
—
—
15
µs
10
—
—
5
15
—
—
4
Enable Pulse Width
t_WH(E)
5.0
440
220
—
ns
10
200
100
—
15
140
70
—
Reset Pulse Width
t_WH(R)
5.0
280
125
—
ns
10
120
55
—
15
90
40
—
Reset Removal Time
t_rem
5.0
–5
– 45
—
ns
10
15
– 15
—
15
20
–5
—
7. The formulas given are for the typical characteristics only at 25_C.
8. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
500 µF
V_DD
I_D
0.01 µF
CERAMIC
PULSE
GENERATOR
C ^Q0
Q1
Q2
E
R
Q3
C_L ^CL
C_L
C_L
V_SS
20 ns
90%
50%
VARIABLE
WIDTH
20 ns
10%
V_SS
Figure 1. Power Dissipation Test Circuit and Waveform
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