LC75829PE Datasheet, PDF (4/22 Pages) Sanyo Semicon Device – 1/4 and 1/3-Duty General-Purpose LCD Display Driver

LC75829PE, 75829PW
1. When CL is stopped at the low level
VIH1
CE
VIH1
CL 50%
VIL1
tr
tφH
tφL
tf
VIH1
DI
VIL1
tds
tdh
tcp tcs
[Figure 2]
2. When CL is stopped at the high level
CE
tφL
tφH
CL
tf
tr
DI
tds
tdh
VIH1
VIH1
50%
VIL1
VIH1
VIL1
tcp tcs
[Figure 3]
3. OSCI pin clock timing in external clock operating mode
OSCI
VIH2
50%
VIL2
tCKH
tCKL
1
fCK= _tCKH+tCKL [kHz]
DCK=
tCKH
tCKH+ tCKL
×100[%]
[Figure 4]
VIL1
tch
VIL1
tch
No.A1462-4/22