LC75829PE Datasheet, PDF (14/22 Pages) Sanyo Semicon Device – 1/4 and 1/3-Duty General-Purpose LCD Display Driver

LC75829PE, 75829PW
(5) DN … S52 pin and S53/OSCI pin state setting control data
This control data bit sets state of the S52 pin and the S53/OSCI pin.
Number of display segments
DN
1/4 duty
1/3 duty
Pin state
S52
S53/OSCI
0
Up to 200 segments
Up to 153 segments
“L” (VSS)
1
Up to 208 segments
Up to 159 segments
S52
Note: “L” (VSS)
S52
: Low (VSS) level output
: Segment output
“L” (VSS)/OSCI : Low (VSS) level output in internal oscillator operating mode (OC=0)
: External clock input in external clock operating mode (OC=1)
S53/OSCI
: Segment output in internal oscillator operating mode (OC=0)
External clock input in external clock operating mode (OC=1)
“L” (VSS)/OSCI
S53/OSCI
(6) FC0 to FC2 … Common/segment output waveform fram frequency control data
These control data bits set the frame frequency of the common and segment output waveforms.
Control data
Frame frequency fo[Hz]
FC0 FC1 FC2
0
0
0
Internal oscillator operating mode
(The control data OC is 0,
fosc=300[kHz]typ)
fosc/6144
External clock operating mode
(The control data OC is 1
and EXF is 0, fCK1=300[kHz]typ)
fCK1/6144
External clock operating mode
(The control data OC is 1
and EXF is 1, fCK2=38[kHz]typ)
fCK2/768
0
0
1
fosc/4608
fCK1/4608
fCK2/576
0
1
0
fosc/3072
fCK1/3072
fCK2/384
0
1
1
fosc/2304
fCK1/2304
fCK2/288
1
0
0
fosc/1536
fCK1/1536
fCK2/192
1
0
1
fosc/1152
fCK1/1152
fCK2/144
1
1
0
fosc/768
fCK1/768
fCK2/96
Note: When is setting (FC0,FC1,FC2)=(1,1,1), the frame frequency is same as frame frequency at the time of the
(FC0,FC1,FC2)=(0,1,0) setting (fosc/3072, fCK1/3072, fCK2/384).
(7) OC … Internal oscillator operating mode/external clock operating mode switching control data
This control data bit selects either the internal oscillator operating mode or external clock operating mode.
OC
Fundamental clock operating mode
I/O pin (S53/OSCI) state
0
Internal oscillator operating mode
S53
1
External clock operating mode
OSCI
Note: S53: Segment output
OSCI: External clock input
(8) SC … Segment on/off control data
This control data bit controls the on/off state of the segments.
SC
Display state
0
On
1
Off
Note that when the segments are turned off by setting SC to 1, the segments are turned off by outputting segment off
waveforms from the segment output pins.
(9) BU … Normal mode/power-saving mode control data
This control data bit selects either normal mode or power-saving mode.
BU
Mode
0
Normal mode
Power saving mode
In this mode, the internal oscillator circuit stops oscillation (the S53/OSCI pin is configured for segment
output) if the IC is in the internal oscillator operating mode (OC=0) and the IC stops receiving external
1
clock signals (the S53/OSCI pin is configured for external clock input) if the IC is in the external clock
operating mode (OC=1). The common and segment output pins go to the VSS level. However, the S1/P1
to S4/P4 output pins can be used as general-purpose output ports under the control of the data bits P0 to
P2. (The general-purpose output port P1 can not be used as clock output).
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