CAT5261 Datasheet, PDF (4/15 Pages) Catalyst Semiconductor – Dual Digitally Programmable Potentiometer

CAT5261
ABSOLUTE MAXIMUM RATINGS⁽¹⁾
Parameters
Temperature Under Bias
Storage Temperature
Voltage on Any Pin with Respect to Ground ^{(1) (2)}
V_CC with Respect to Ground
Package Power Dissipation Capability (T_A = 25ºC)
Lead Soldering Temperature (10 s)
Wiper Current
Ratings
-55 to +125
-65 to +150
-2.0 to +V_CC + 2.0
-0.2 to +7.0
1.0
300
±6
Units
ºC
°C
V
V
W
ºC
mA
RECOMMENDED OPERATING CONDITIONS
Parameters
V_CC
Industrial Temperature
Ratings
+2.5 to +6.0
-40 to +85
Units
V
°C
POTENTIOMETER CHARACTERISTICS
(Over recommended operating conditions unless otherwise stated.)
Symbol
R_POT
R_POT
Parameter
Potentiometer Resistance (-00)
Potentiometer Resistance (-50)
Potentiometer Resistance
Tolerance
R_POT Matching
Power Rating
Test Conditions
25°C, each pot
Limits
Min Typ. Max
100
50
±20
1
50
Units
kΩ
kΩ
%
%
mW
I_W
R_W
R_W
V_TERM
VN
Wiper Current
Wiper Resistance
Wiper Resistance
Voltage on any R_H or R_L Pin
Noise
I_W = ±3 mA @ V_CC = 3 V
I_W = ±3 mA @ V_CC = 5 V
(4)
±3
mA
200 300
Ω
100 150
Ω
0
V_CC
V
nV√Hz
Resolution
Absolute Linearity ⁽⁵⁾
Relative Linearity ⁽⁶⁾
Rw(n)(actual)-R(n)(expected)⁽⁸⁾
Rw(n+1)-[Rw(n)+LSB]⁽⁸⁾
0.4
%
±1
LSB ⁽⁷⁾
±0.2 LSB ⁽⁷⁾
TC_RPOT
TC_RATIO
C_H/C_L/C_W
fc
Temperature Coefficient of R_POT
Ratiometric Temp. Coefficient
Potentiometer Capacitances
Frequency Response
(4)
(4)
(4)
R_POT = 50 kΩ ⁽⁴⁾
±300
20
10/10/25
0.4
ppm/ºC
ppm/ºC
pF
MHz
Notes:
(1) Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions outside of those listed in the operational sections of this
specification is not implied. Exposure to any absolute maximum rating for extended periods may affect device performance and reliability.
(2) The minimum DC input voltage is –0.5 V. During transitions, inputs may undershoot to –2.0 V for periods of less than 20 ns. Maximum DC
voltage on output pins is V_CC +0.5 V, which may overshoot to V_CC +2.0 V for periods of less than 20 ns.
(3) Latch-up protection is provided for stresses up to 100 mA on address and data pins from –1 V to V_CC +1 V.
(4) This parameter is tested initially and after a design or process change that affects the parameter.
(5) Absolute linearity is utilized to determine actual wiper voltage versus expected voltage as determined by wiper position when used as a potentiometer.
(6) Relative linearity is utilized to determine the actual change in voltage between two successive tap positions when used as a potentio-
meter. It is a measure of the error in step size.
(7) LSB = R_TOT / 255 or (R_H - R_L) / 255, single pot
(8) n = 0, 1, 2, ..., 255
Doc. No. MD-2122 Rev. G
4
© 2009 SCILLC. All rights reserved.
Characteristics subject to change without notice