AX-SIGFOX-MODS_16 Datasheet, PDF (4/13 Pages) ON Semiconductor – Compliant Modules

AX−SIGFOX−MODS
Table 1. PIN FUNCTION DESCRIPTION
Pin
Name
Function
31
GPIO2
General purpose IO, selectable ADC functionality
32
NC
Do not connect
33
NC
34
GPIO3
General purpose IO, selectable ADC functionality
NOTE: All digital pins are Schmitt trigger inputs, digital input and output levels are LVCMOS/LVTTL compatible. Pins GPIO[3:0] must not be
driven above VDD, all other digital inputs are 5 V tolerant.
All GPIO pins and UART_RX start−up as inputs with pull−up.
Dimensions
MINISTAMP
22
ANTSTAMP
39.7
1.8
1.8
1.2 x 1.9
22
1.2 x 1.9
39.7
PIN 1
1.8
NO COPPER
IN THIS AREA
1.8
3.8
3.8
17.7
3.8
3.8
All dimensions in millimeter.
Figure 3. Dimensions (mm)
The area under the modules must be covered in solder
stop. To guarantee good antenna performance with the
AX−SIGFOX ANTSTAMP, the left part of the module must
remain free from any copper (i.e. no ground plane and no
traces).
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