2N4921_06 Datasheet, PDF (4/6 Pages) ON Semiconductor – Medium−Power Plastic NPN Silicon Transistors

2N4921, 2N4922, 2N4923
1.0
0.7 _{D = 0.5}
0.5
0.3 _0.2
0.2 _0.1
0.1 0.05
0.07
0.05 ^0.01
0.03 _{SINGLE PULSE}
0.02
q_JC(t) = r(t) q_JC
P_(pk)
q_JC = 4.16°C/W MAX
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t₁
T_J(pk) − T_C = P_(pk) q_JC(t)
t₁
t₂
DUTY CYCLE, D = t₁/t₂
0.01
0.01 0.02 0.03 0.05 0.1 0.2 0.3 0.5 1.0 2.0 3.0 5.0 10 20 30 50 100 200 300 500 1000
t, TIME (ms)
Figure 4. Thermal Response
10
7.0
5.0
5.0 ms
100 ms
1.0 ms
3.0
2.0
T_J = 150°C
dc
1.0
0.7
SECOND BREAKDOWN
0.5
LIMITED
BONDING WIRE LIMITED
0.3
THERMALLY LIMITED @ T_C = 25°C
0.2 _{PULSE CURVES APPLY BELOW}
0.1
1.0
RATED V_CEO
2.0 3.0 5.0 7.0 10
20 30
50 70 100
V_CE, COLLECTOR−EMITTER VOLTAGE (VOLTS)
Figure 5. Active−Region Safe Operating Area
There are two limitations on the power handling ability of
a transistor: average junction temperature and second
breakdown. Safe operating area curves indicate I_C − V_CE
operation i.e., the transistor must not be subjected to greater
dissipation than the curves indicate.
The data of Figure 5 is based on T_J(pk) = 150_C; T_C
is variable depending on conditions. Second breakdown
pulse limits are valid for duty cycles to 10% provided
T_J(pk) v 150_C. At high case temperatures, thermal
limitations will reduce the power that can be handled to
values less than the limitations imposed by second
breakdown.
5.0
3.0
2.0
1.0
0.7
0.5
0.3
0.2
0.1
0.07
0.05
10
I_C/I_B = 20
I_C/I_B = 10
I_C/I_B = 20
T_J = 25°C
T_J = 150°C
I_B1 = I_B2
t_s′ = t_s − 1/8 t_f
20 30 50 70 100 200 300
I_C, COLLECTOR CURRENT (mA)
Figure 6. Storage Time
500 700 1000
5.0
3.0
2.0
1.0
0.7
0.5
0.3
0.2
0.1
0.07
0.05
10
I_C/I_B = 20
I_C/I_B = 10
T_J = 25°C
T_J = 150°C
V_CC = 30 V
I_B1 = I_B2
20 30 50 70 100 200 300 500 700 1000
I_C, COLLECTOR CURRENT (mA)
Figure 7. Fall Time
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