2N4921_06 Datasheet, PDF (1/6 Pages) ON Semiconductor – Medium−Power Plastic NPN Silicon Transistors

2N4921, 2N4922, 2N4923
2N4923 is a Preferred Device
Medium−Power Plastic
NPN Silicon Transistors
These high−performance plastic devices are designed for driver
circuits, switching, and amplifier applications.
Features
• Low Saturation Voltage − V_CE(sat) = 0.6 Vdc (Max) @ I_C = 1.0 A
• Excellent Power Dissipation Due to Thermopad Construction −
P_D = 30 W @ T_C = 25_C
• Excellent Safe Operating Area
• Gain Specified to I_C = 1.0 A
• Complement to PNP 2N4918, 2N4919, 2N4920
• Pb−Free Packages are Available*
http://onsemi.com
1.0 AMPERE
GENERAL PURPOSE
POWER TRANSISTORS
40−80 VOLTS, 30 WATTS
MAXIMUM RATINGS
Rating
Symbol Value
Unit
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{Collector−Emitter Voltage}
2N4921 V_CEO
40
Vdc
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ 2N4922
60
2N4923
80
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{Collector−Emitter Voltage}
2N4921 V_CB
40
Vdc
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _2N4922
60
2N4923
80
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{Emitter Base Voltage}
V_EB
5.0
Vdc
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{Collector Current − Continuous (Note 1)}
I_C
1.0
Adc
3.0
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{Base Current − Continuous}
I_B
1.0
Adc
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Total Power Dissipation @ T_C = 25_C
P_D
30
W
Derate above 25_C
0.24
mW/_C
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{Operating and Storage Junction}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{Temperature Range}
T_J, T_stg –65 to +150 _C
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{THERMAL CHARACTERISTICS (Note 2)}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ^{Characteristic}
Symbol
Max
Unit
Thermal Resistance, Junction−to−Case
q_JC
4.16
_C/W
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
1. The 1.0 A maximum I_C value is based upon JEDEC current gain requirements.
The 3.0 A maximum value is based upon actual current handling capability of
the device (see Figures 5 and 6).
2. Recommend use of thermal compound for lowest thermal resistance.
*Indicates JEDEC Registered Data.
321
TO−225
CASE 77
STYLE 1
MARKING DIAGRAM
1
YWW
2
N492xG
Y
= Year
WW = Work Week
2N492x = Device Code
x = 1, 2, or 3
G
= Pb−Free Package
ORDERING INFORMATION
Device
Package
Shipping
2N4921
TO−225
500 Units / Box
2N4921G
TO−225
(Pb−Free)
500 Units / Box
2N4922
TO−225
500 Units / Box
2N4922G
TO−225
(Pb−Free)
500 Units / Box
2N4923
TO−225
500 Units / Box
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
2N4923G
TO−225
(Pb−Free)
500 Units / Box
Preferred devices are recommended choices for future use
and best overall value.
© Semiconductor Components Industries, LLC, 2006
1
January, 2006 − Rev. 11
Publication Order Number:
2N4921/D