SA3291_16 Datasheet, PDF (3/21 Pages) ON Semiconductor – Preconfigured Wireless DSP System

AYRE SA3291
BLOCK DIAGRAM
3
Voltage
Regulator
1
22
M
2
U
X
19
A/D
MIC/TCOIL
A/D
COMP
21
15
Programming
14
Interface
Clock
Generator
Acoustic
Indicators
18
9
POR Circuitry
11
Adaptive
Directional
Microphone
or
FrontWave
Pre
Biquad
Filters
Frequency
Band
Analysis
Wireless
Audio/Data
Post
Biquad
Σ
Filters
3&4
*
Feedback
Canceller
**
Cross
Fader
Peak
Clipper
Noise Generator
and Shaper
AGCO
Volume
Control
Σ ^Wideband
Gain
Environmental
Classification
128 bands
WDRC (1,2,4,6 or 8 Channels)
Noise Reduction (128 bands)
Graphic EQ (16 bands)
Post
Biquad
Filters
1&2
Frequency
Band
Synthesis
Data
Logging
12
D/A
Hbridge
13
10
Control
A/D
4
5
Control
(MS/DIGVC) ₁₇
16
EEPROM
6
8
7 20
* If Input Mode = 1 mic omni, mic + telecoil, mic + DAI
** If Input Mode = 2 mic omni, rear only, directional
Figure 1. Hybrid Block Diagram
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