NSQA6V8AW5T2_06 Datasheet, PDF (3/4 Pages) ON Semiconductor – Low Capacitance Quad Array for ESD Protection

100
10
1
1
NSQA6V8AW5T2 Series
10
100
t, TIME (ms)
Figure 1. Pulse Width
1000
110
100
90
80
70
60
50
40
30
20
10
0
0
25
50
75
100
125
150
T_A, AMBIENT TEMPERATURE (°C)
Figure 2. Power Derating Curve
0.16
14
0.14
12
0.12
10
0.10
8
0.08
6
0.06
0.04
4
0.02
2
0
0
−60 −40 −20 0 20 40 60 80 100
0
T, TEMPERATURE (°C)
Figure 3. Reverse Leakage versus
Temperature
T_A = 25°C
6V
12 V
1
2
3
4
5
6
BIAS VOLTAGE (V)
Figure 4. Capacitance
100
t_r
90
80
70
60
50
PEAK VALUE I_RSM @ 8 ms
PULSE WIDTH (t_P) IS DEFINED
AS THAT POINT WHERE THE
PEAK CURRENT DECAY = 8 ms
HALF VALUE I_RSM/2 @ 20 ms
40
30
t_P
20
10
0
0
20
40
60
80
t, TIME (ms)
Figure 5. 8 × 20 ms Pulse Waveform
1
0.1
0.01
0.001
0.6
T_A = 25°C
0.8
1.0
1.2
1.4
1.6
1.8
V_F, FORWARD VOLTAGE (V)
Figure 6. Forward Voltage
http://onsemi.com
3