MJF122 Datasheet, PDF (3/7 Pages) ON Semiconductor – COMPLEMENTARY SILICON POWER DARLINGTONS 5.0 A, 100 V, 30 W

T_A T_C
4 80
MJF122, MJF127
3 60
T_C
2 40
1 20
T_A
0
0 20 40 60 80 100 120 140 160
T, TEMPERATURE (°C)
Figure 3. Maximum Power Derating
1
0.5
0.3
0.2
0.1
0.05
0.03
0.02
0.01
0.1
0.2 0.3 0.5
SINGLE PULSE
R_qJC(t) = r(t) R_qJC
T_J(pk) − T_C = P_(pk) R_qJC(t)
1
2 3 5 10 20 30 50 100 200 300 500 1K 2K 3K 5K 10K
t, TIME (ms)
Figure 4. Thermal Response
10
5
3 _{TJ = 150°C}
2
1
100 ms
1 ms
d
5 ms
c
0.5
CURRENT LIMIT
SECONDARY BREAKDOWN
0.3
LIMIT
0.2
THERMAL LIMIT @
T_C = 25°C (SINGLE PULSE)
0.1
1
23 5
10
20 30 50
100
V_CE, COLLECTOR−EMITTER VOLTAGE (VOLTS)
Figure 5. Maximum Forward Bias
Safe Operating Area
There are two limitations on the power handling ability of
a transistor: average junction temperature and second
breakdown. Safe operating area curves indicate I_C − V_CE
limits of the transistor that must be observed for reliable
operation; i.e., the transistor must not be subjected to greater
dissipation than the curves indicate.
The data of Figure 5 is based on T_J(pk) = 150_C; T_C is
variable depending on conditions. Secondary breakdown
pulse limits are valid for duty cycles to 10% provided T_J(pk)
< 150_C. T_J(pk) may be calculated from the data in Figure 4.
At high case temperatures, thermal limitations will reduce
the power that can be handled to values less than the
limitations imposed by secondary breakdown.
http://onsemi.com
3