MC74LVX74_14 Datasheet, PDF (3/7 Pages) ON Semiconductor – Dual D-Type Flip-Flop with Set and Clear

MC74LVX74
AC ELECTRICAL CHARACTERISTICS (Input t_r = t_f = 3.0ns)
T_A = 25°C
T_A = −40 to 85°C
Symbol
Parameter
Test Conditions
Min Typ Max Min
Max
Unit
t_PLH,
t_PHL
Propagation Delay
CP to O or O
V_CC = 2.7V
C_L = 15pF
C_L = 50pF
7.3 15.0 1.0
18.5
ns
9.8 18.5 1.0
22.0
V_CC = 3.3 ± 0.3V
C_L = 15pF
C_L = 50pF
5.7 9.7
1.0
11.5
8.2 13.2 1.0
15.0
t_PLH,
t_PHL
Propagation Delay
SD or CD to O or O
V_CC = 2.7V
C_L = 15pF
C_L = 50pF
8.4 15.6 1.0
18.5
ns
10.9 19.1 1.0
22.0
V_CC = 3.3 ± 0.3V
C_L = 15pF
C_L = 50pF
6.6 10.1 1.0
12.0
9.1 13.6 1.0
15.5
f_max Maximum Clock Frequency
V_CC = 2.7V
C_L = 15pF 55 135
50
(50% Duty Cycle)
C_L = 50pF 45
60
40
MHz
V_CC = 3.3 ± 0.3V C_L = 15pF 95 145
80
C_L = 50pF 60
85
50
t_OSHL
t_OSLH
Output−to−Output Skew
(Note 1)
V_CC = 2.7V
V_CC = 3.3 ±0.3V
C_L = 50pF
C_L = 50pF
1.5
1.5
ns
1.5
1.5
1. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.
The specification applies to any outputs switching in the same direction, either HIGH−to−LOW (t_OSHL) or LOW−to−HIGH (t_OSLH); parameter
guaranteed by design.
TIMING REQUIREMENTS (Input t_r = t_f = 3.0ns)
Symbol
Parameter
t_w
Minimum Pulse Width, CP
t_w
Minimum Pulse Width, CD or SD
t_su
Minimum Setup Time, D to CP
t_h
Minimum Hold Time, D to CP
t_rec Minimum Recovery Time, SD or CD to CP
V_CC
V
2.7V
3.3V ±0.3
2.7V
3.3V ±0.3
2.7V
3.3V ±0.3
2.7V
3.3V ±0.3
2.7V
3.3V ±0.3
Guaranteed Limit
T_A = 25_C
8.5
6.0
T_A = −40 to 85_C _Unit
10.0
ns
7.0
8.5
10.0
ns
6.0
7.0
8.0
9.5
ns
5.5
6.5
0.5
0.5
ns
0.5
0.5
6.5
7.5
ns
5.0
5.0
CAPACITIVE CHARACTERISTICS
Symbol
Cin Input Capacitance
Parameter
T_A = 25°C
T_A = −40 to 85°C
Min Typ Max Min
Max
Unit
4
10
10
pF
C_PD Power Dissipation Capacitance (Note 2)
25
pF
2. C_PD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: I_CC(OPR) = C_PD  V_CC  f_in + I_CC / 2 (per flip−flop). C_PD is used to determine the
no−load dynamic power consumption; P_D = C_PD  V_CC2  f_in + I_CC  V_CC.
NOISE CHARACTERISTICS (Input t_r = t_f = 3.0ns, C_L = 50pF, V_CC = 3.3V, Measured in SOIC Package)
T_A = 25°C
Symbol
Characteristic
Typ
Max
Unit
V_OLP Quiet Output Maximum Dynamic V_OL
0.3
0.5
V
V_OLV Quiet Output Minimum Dynamic V_OL
−0.3
−0.5
V
V_IHD Minimum High Level Dynamic Input Voltage
2.0
V
V_ILD Maximum Low Level Dynamic Input Voltage
0.8
V
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