MC74LVX74_14 Datasheet, PDF (1/7 Pages) ON Semiconductor – Dual D-Type Flip-Flop with Set and Clear

MC74LVX74
Dual D-Type Flip-Flop
with Set and Clear
With 5.0 V−Tolerant Inputs
The MC74LVX74 is an advanced high speed CMOS D−type
flip−flop. The inputs tolerate voltages up to 7.0 V, allowing the
interface of 5.0 V systems to 3.0 V systems.
The signal level applied to the D input is transferred to O output
during the positive going transition of the Clock pulse.
Clear (CD) and Set (SD) are independent of the Clock (CP) and are
accomplished by setting the appropriate input Low.
Features
• High Speed: f_max = 145 MHz (Typ) at V_CC = 3.3 V
• Low Power Dissipation: I_CC = 2 mA (Max) at T_A = 25°C
• Power Down Protection Provided on Inputs
• Balanced Propagation Delays
• Low Noise: V_OLP = 0.5 V (Max)
• Pin and Function Compatible with Other Standard Logic Families
• Latchup Performance Exceeds 300 mA
• ESD Performance:
Human Body Model > 2000 V;
Machine Model > 200 V
• These Devices are Pb−Free and are RoHS Compliant
4
SD1
2
D1
3
CP1
1
CD1
SD
D
Q
CP
Q
CD
5
O1
6
O1
10
SD2
12
D2
11
CP2
13
CD2
SD
D
Q
CP
Q
CD
Figure 1. Logic Diagram
9
O2
8
O2
© Semiconductor Components Industries, LLC, 2014
1
August, 2014 − Rev. 5
http://onsemi.com
SOIC−14 NB
D SUFFIX
CASE 751A
TSSOP−14
DT SUFFIX
CASE 948G
PIN ASSIGNMENT
V_CC CD2 D2 CP2 SD2 O2 O2
14 13 12 11 10 9 8
1234567
CD1 D1 CP1 SD1 O1 O1 GND
14−Lead (Top View)
MARKING DIAGRAMS
14
LVX74G
AWLYWW
1
SOIC−14 NB
14
LVX
74
ALYW G
G
1
TSSOP−14
LVX74 = Specific Device Code
A
= Assembly Location
WL, L = Wafer Lot
Y
= Year
W, WW = Work Week
G or G = Pb−Free Package
(Note: Microdot may be in either location)
PIN NAMES
Pins
Function
CP1, CP2
D1, D2
CD1, CD2
SD1, SD2
On, On
Clock Pulse Inputs
Data Inputs
Direct Clear Inputs
Direct Set Inputs
Outputs
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
Publication Order Number:
MC74LVX74/D