MC74HCT541A_06 Datasheet, PDF (3/8 Pages) ON Semiconductor – Octal 3−State Non−Inverting Buffer/Line Driver/ Line Receiver With LSTTL−Compatible Inputs

MC74HCT541A
DC CHARACTERISTICS (Voltages Referenced to GND)
Symbol
Parameter
V_IH Minimum High−Level Input Voltage
V_IL Maximum Low−Level Input Voltage
V_OH Minimum High−Level Output Voltage
V_OL Maximum Low−Level Output Voltage
I_in
Maximum Input Leakage Current
I_OZ Maximum 3−State Leakage Current
I_CC Maximum Quiescent Supply Current
(per Package)
Condition
V_out = 0.1V or V_CC − 0.1V
|I_out| ≤ 20mA
V_out = 0.1V or V_CC − 0.1V
|I_out| ≤ 20mA
V_in = V_IH or V_IL
|I_out| ≤ 20mA
V_in = V_IH or V_IL
|I_out| ≤ 6.0mA
V_in = V_IH or V_IL
|I_out| ≤ 20mA
V_in = V_IH or V_IL
|I_out| ≤ 6.0mA
V_in = V_CC or GND
Output in High Impedance State
V_in = V_IL or V_IH
V_out = V_CC or GND
V_in = V_CC or GND
I_out = 0mA
V_CC
Guaranteed Limit
V −55 to 25°C ≤85°C ≤125°C Unit
4.5
2.0
5.5
2.0
2.0
2.0
V
2.0
2.0
4.5
0.8
5.5
0.8
0.8
0.8
V
0.8
0.8
4.5
4.4
5.5
5.4
4.4
4.4
V
5.4
5.4
4.5
3.98
3.84 3.70
4.5
0.1
5.5
0.1
0.1
0.1
V
0.1
0.1
4.5
0.26
0.33 0.40
5.5
±0.1
±1.0
±1.0
mA
5.5
±0.5
±5.0 ±10.0 mA
5.5
4
40
160 mA
DI_CC
Additional Quiescent Supply Current
V_in = 2.4V, Any One Input
V_in = V_CC or GND, Other Inputs
I_out = 0mA
≥ −55°C
5.5
2.9
25 to 125°C
2.4
mA
1. Information on typical parametric values can be found in Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book (DL129/D).
2. Total Supply Current = I_CC + ΣDI_CC.
AC CHARACTERISTICS (V_CC = 5.0V, C_L = 50 pF, Input t_r = t_f = 6 ns)
Guaranteed Limit
Symbol
Parameter
−55 to 25°C ≤85°C ≤125°C Unit
t_PLH,
t_PHL
Maximum Propagation Delay, Input A to Output Y
(Figures 1 and 3)
23
28
32
ns
t_PLZ,
t_PHZ
Maximum Propagation Delay, Output Enable to Output Y
(Figures 2 and 4)
30
34
38
ns
t_PZL,
t_PZH
Maximum Propagation Delay, Output Enable to Output Y
(Figures 2 and 4)
30
34
38
ns
t_TLH,
t_THL
Maximum Output Transition Time, Any Output
(Figures 1 and 3)
12
15
18
ns
C_in Maximum Input Capacitance
10
10
10
pF
C_out Maximum 3−State Output Capacitance (Output in High Impedance State)
15
15
15
pF
NOTE: For propagation delays with loads other than 50 pF, and information on typical parametric values, see Chapter 2 of the ON
Semiconductor High−Speed CMOS Data Book (DL129/D).
Typical @ 25°C, V_CC = 5.0 V
C_PD Power Dissipation Capacitance (Per Buffer)*
55
pF
* Used to determine the no−load dynamic power consumption: P_D = C_PD V_CC2f + I_CC V_CC. For load considerations, see Chapter 2 of the
ON Semiconductor High−Speed CMOS Data Book (DL129/D).
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