MC74HCT373A_14 Datasheet, PDF (3/7 Pages) ON Semiconductor – Octal 3-State Noninverting Transparent Latch with LSTTL-Compatible Inputs

MC74HCT373A
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)
Guaranteed Limit
Symbol
Parameter
Test Conditions
V_CC
−55 to
V
25°C
≤ 85°C ≤ 125°C Unit
V_IH
Minimum High−Level Input
V_out = 0.1 V or V_CC – 0.1 V
Voltage
|I_out| ≤ 20 mA
4.5
2.0
2.0
2.0
V
5.5
2.0
2.0
2.0
V_IL
Maximum Low−Level Input
V_out = 0.1 V or V_CC – 0.1 V
Voltage
|I_out| ≤ 20 mA
4.5
0.8
0.8
0.8
V
5.5
0.8
0.8
0.8
V_OH
Minimum High−Level Output V_in = V_IH or V_IL
Voltage
|I_out| ≤ 20 mA
4.5
4.4
4.4
4.4
V
5.5
5.4
5.4
5.4
V_in = V_IH or V_IL
|I_out| ≤ 6.0 mA
4.5
3.98
3.84
3.7
V_OL
Maximum Low−Level Output V_in = V_IH or V_IL
Voltage
|I_out| ≤ 20 mA
4.5
0.1
0.1
0.1
V
5.5
0.1
0.1
0.1
V_in = V_IH or V_IL
|I_out| ≤ 6.0 mA
4.5
0.26
0.33
0.4
I_in
Maximum Input Leakage
Current
V_in = V_CC or GND
5.5
±0.1
±1.0
±1.0
mA
I_OZ
Maximum Three−State
Leakage Current
Output in High−Impedance State 5.5
±0.5
±5.0
±10
mA
V_in = V_IL or V_IH
V_out = V_CC or GND
I_CC
Maximum Quiescent Supply V_in = V_CC or GND
5.5
4.0
40
160
mA
Current (per Package)
I_out = 0 mA
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ DI_CC
Additional Quiescent Supply V_in = 2.4 V, Any One Input
5.5
Current
V_in = V_CC or GND, Other Inputs
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{lout = 0 mA}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{NOTE: 1. Total Supply Current = ICC + SDICC.}
≥ −55°C
2.9
25°C to 125°C mA
2.4
AC ELECTRICAL CHARACTERISTICS (V_CC = 5.0 V ±10%, C_L = 50 pF, Input t_r = t_f = 6.0 ns)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{Guaranteed Limit}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _Symbol
Parameter
−55 to
25°C
≤ 85°C
≤ 125°C
Unit
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ tPLH,
t_PHL
Maximum Propagation Delay, Input D to Q
(Figures 1 and 5)
28
35
42
ns
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _tPLH,
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _tPHL
Maximum Propagation Delay, Latch Enable to Q
(Figures 2 and 5)
32
40
48
ns
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _tPLZ,
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ t_PHZ
Maximum Propagation Delay, Output Enable to Q
(Figures 3 and 6)
30
38
45
ns
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ tPZL,
t_PZH
Maximum Propagation Delay, Output Enable to Q
(Figures 3 and 6)
35
44
53
ns
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _tTLH,
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _tTHL
Maximum Output Transition Time, Any Output
(Figures 1 and 5)
12
15
18
ns
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _Cin
Maximum Input Capacitance
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _Cout
Maximum Three−State Output Capacitance
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ^{(Output in High−Impedance State)}
10
10
10
pF
15
15
15
pF
Typical @ 25°C, V_CC = 5.0 V
C_PD
Power Dissipation Capacitance (Per Latch)*
65
pF
* Used to determine the no−load dynamic power consumption: P_D = C_PD V_CC2f + I_CC V_CC.
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