CM2006 Datasheet, PDF (3/9 Pages) California Micro Devices Corp – VGA Port Companion Circuit For Monitors

CM2006
PIN DESCRIPTIONS
LEAD(s)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
NAME
V_CC
DESCRIPTION
This is a supply input for the SYNC_1 and SYNC_2 level shifters, video protection and the
DDC circuits.
ENABLE
Active high enable. Disables the Sync buffer outputs when low.
VIDEO_1
Video signal ESD protection channel. This pin is typically tied one of the video lines between
the controller device and the video connector.
VIDEO_2
Video signal ESD protection channel. This pin is typically tied one of the video lines between
the controller device and the video connector.
VIDEO_3
Video signal ESD protection channel. This pin is typically tied one of the video lines between
the controller device and the video connector.
GND
Ground reference supply pin.
V_{CC_DDC}
BYP
This is an isolated supply input for the DDC_1 and DDC_2 level-shifting N-FET gates.
An external 0.22uF bypass capacitor is required on this pin.
DDC_IN1
DDC_OUT1
DDC signal input. Connects to the video connector side of one of the DDC lines.signal
output.
DDC signal output. Connects to the monitor DDC logic.
DDC_OUT DDC signal output. Connects to the monitor DDC logic.
DDC_IN2 DDC signal input. Connects to the video connector side of one of the DDC lines
SYNC_IN1 Sync signal buffer input. Connects to the video connector side of one of the sync lines.
SYNC_OUT1 Sync signal buffer output. Connects to the monitor SYNC logic.
SYNC_IN2 Sync signal buffer input. Connects to the video connector side of one of the sync lines.
SYNC_OUT2 Sync signal buffer output. Connects to the monitor SYNC logic.
Ordering Information
PART NUMBERING INFORMATION
Pins
16
Package
QSOP
Ordering Part Number¹
CM2006-02QR
Note 1: Parts are shipped in Tape and Reel form unless otherwise specified.
Part Marking
CM2006-02QR
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