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CAT24C64BAC4 Datasheet, PDF (3/9 Pages) ON Semiconductor – 64 Kb I2C CMOS Serial EEPROM 4-ball WLCSP
CAT24C64BC4, CAT24C64BAC4
Table 5. A.C. CHARACTERISTICS (VCC = 1.7 V to 5.5 V, TA = −40°C to +85°C) (Note 5)
Standard
Fast
Symbol
Parameter
Min
Max
Min
Max
FSCL
Clock Frequency
100
400
tHD:STA
START Condition Hold Time
4
0.6
tLOW
Low Period of SCL Clock
4.7
1.3
tHIGH
High Period of SCL Clock
4
0.6
tSU:STA
START Condition Setup Time
4.7
0.6
tHD:DAT
Data In Hold Time
0
0
tSU:DAT
Data In Setup Time
250
100
tR (Note 6)
SDA and SCL Rise Time
1,000
300
tF (Note 6)
SDA and SCL Fall Time
300
300
tSU:STO
STOP Condition Setup Time
4
0.6
tBUF
Bus Free Time Between
4.7
1.3
STOP and START
Fast−Plus
Min
Max
1,000
0.25
0.45
0.35
0.25
0
50
100
100
0.25
0.5
Units
kHz
ms
ms
ms
ms
ms
ns
ns
ns
ms
ms
tAA
SCL Low to Data Out Valid
3.5
0.9
tDH (Note 6)
Data Out Hold Time
100
100
Ti (Note 6)
Noise Pulse Filtered at SCL
50
50
and SDA Inputs
0.40
ms
50
ns
50
ns
tWR
Write Cycle Time
4
4
4
ms
tPU (Notes 6, 7) Power−up to Ready Mode
0.35
0.35
0.35
ms
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
5. Test conditions according to “A.C. Test Conditions” table.
6. Tested initially and after a design or process change that affects this parameter.
7. tPU is the delay between the time VCC is stable and the device is ready to accept commands.
Table 6. A.C. TEST CONDITIONS
Input Levels
VCC ≥ 2.2 V: 0.2 x VCC to 0.8 x VCC
VCC < 2.2 V: 0.15 x VCC to 0.85 x VCC
Input Rise and Fall Times
≤ 50 ns
Input Reference Levels
Output Reference Levels
Output Load
0.3 x VCC, 0.7 x VCC
0.3 x VCC, 0.7 x VCC
Current Source: IOL = 3 mA (VCC ≥ 2.2 V); IOL = 1 mA (VCC < 2.2 V); CL = 100 pF
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