3EZ6.2D5 Datasheet, PDF (3/5 Pages) ON Semiconductor – 3 Watt DO-41 Surmetic™ 30 Zener Voltage Regulators

3EZ6.2D5 Series
30
20
D =0.5
10
7
0.2
5
0.1
3
2
0.05
0.02
1
0.7
0.01
0.5
D=0
0.3
0.0001 0.0002
P_PK t1
t₂
DUTY CYCLE, D =t₁/t₂
0.0005
NOTE: BELOW 0.1 SECOND, THERMAL
RESPONSE CURVE IS APPLICABLE
TO ANY LEAD LENGTH (L).
SINGLE PULSE DT_JL = q_JL (t)P_PK
REPETITIVE PULSES DT_JL = q_JL (t,D)P_PK
0.001 0.002 0.005 0.01 0.02
0.05 0.1 0.2
0.5 1
2
5 10
t, TIME (SECONDS)
Figure 2. Typical Thermal Response L, Lead Length = 3/8 Inch
1K
RECTANGULAR
500
NONREPETITIVE
WAVEFORM
300
T_JĂ=Ă25°C PRIOR
200
TO INITIAL PULSE
100
50
30
20
10
0.1 0.2 0.3 0.5
1 2 3 5 10 20 30 50 100
PW, PULSE WIDTH (ms)
Figure 3. Maximum Surge Power
3
2
1
0.5
0.2
0.1
0.05
0.02
0.01
0.005
0.002
0.001
0.0005
0.0003
1
T_A = 125°C
T_A = 125°C
2
5 10 20 50 100 200 400 1000
NOMINAL V_Z (VOLTS)
Figure 4. Typical Reverse Leakage
APPLICATION NOTE
Since the actual voltage available from a given zener
diode is temperature dependent, it is necessary to determine
junction temperature under any set of operating conditions
in order to calculate its value. The following procedure is
recommended:
Lead Temperature, T_L, should be determined from:
T_L = q_LA P_D + T_A
q_LA is the lead‐to‐ambient thermal resistance (°C/W) and
P_D is the power dissipation. The value for q_LA will vary and
depends on the device mounting method. q_LA is generally
30-40°C/W for the various clips and tie points in common
use and for printed circuit board wiring.
The temperature of the lead can also be measured using a
thermocouple placed on the lead as close as possible to the
tie point. The thermal mass connected to the tie point is
normally large enough so that it will not significantly
respond to heat surges generated in the diode as a result of
pulsed operation once steady‐state conditions are achieved.
Using the measured value of T_L, the junction temperature
may be determined by:
T_J = T_L + DT_JL
DT_JL is the increase in junction temperature above the lead
temperature and may be found from Figure 2 for a train of
power pulses (L = 3/8 inch) or from Figure 10 for dc power.
DT_JL = q_JL P_D
For worst‐case design, using expected limits of I_Z, limits
of P_D and the extremes of T_J (DT_J) may be estimated.
Changes in voltage, V_Z, can then be found from:
DV = q_VZ DT_J
q_VZ, the zener voltage temperature coefficient, is found
from Figures 5 and 6.
Under high power‐pulse operation, the zener voltage will
vary with time and may also be affected significantly by the
zener resistance. For best regulation, keep current
excursions as low as possible.
Data of Figure 2 should not be used to compute surge
capability. Surge limitations are given in Figure 3. They are
lower than would be expected by considering only junction
temperature, as current crowding effects cause temperatures
to be extremely high in small spots resulting in device
degradation should the limits of Figure 3 be exceeded.
http://onsemi.com
3