NOIM1SM9600A Datasheet, PDF (20/66 Pages) ON Semiconductor – MANO 9600 9.6 MegaPixel Rolling Shutter CMOS Image Sensor

NOIM1SM9600A, NOIM2SM9600A
Dynamic Readout Parameters
It is possible to reconfigure the sensor while it is acquiring
images. Frame-related parameters are internally
resynchronized to frame boundaries, such that the modified
parameter does not affect a frame that has already started.
However, there can be restrictions to some registers as
shown in Table 18. Some reconfiguration may lead to one
frame being blanked. This happens when the modification
requires more than one frame to settle. The image is blanked
out and training patterns are transmitted on the data and sync
channels.
Table 18. DYNAMIC READOUT PARAMETERS
Group
Addresses
Description
Subsampling/binning
232[4:0]
Subsampling or binning is synchronized to a new frame start. Subsampling / binning also
required to reconfigure black line address (230[9:5]), last line address 231[12:0] and
Y−start offset (230[4:0]) as mentioned in detail in register map given in Table 45 on page
44. Reconfiguration of these parameters cause one frame to be blanked out
Black lines
197
Reconfiguration of these parameters causes one frame to be blanked out as the reset
pointers need to be recalculated for the new frame timing.
Dummy lines
198
Reconfiguration of these parameters causes one frame to be blanked out as the reset
pointers need to be recalculated for the new frame timing.
ROI configuration
195
256–263
Optionally, it is possible to blank out one frame after reconfiguration of the active ROI in
rolling shutter mode. Therefore, register 192[9] must be asserted (blank_roi_switch
configuration).
A ROI switch is only detected when a new window is selected as the active window
(reconfiguration of register 195). Reconfiguration of the ROI dimension of the active
window does not lead to a frame blank and can cause a corrupted image.
Exposure reconfiguration
203
Exposure reconfiguration does not cause artifact.
Gain reconfiguration
204
Gains are synchronized at the start of a new frame. Optionally, one frame latency can be
incorporated to align the gain updates to the exposure updates
(refer to register 199[13] - gain_lat_comp).
Freezing Active Configurations
Though the readout parameters are synchronized to frame
boundaries, an update of multiple registers can still lead to
a transient effect in the subsequent images, as some
configurations require multiple register uploads. For
example, to reconfigure sub−sampling / binning scheme we
also need to update black line address, Y−start offset and last
line address registers. Internally, the sensor synchronizes
these configurations to frame boundaries, but it is still
possible that the reconfiguration of multiple registers spans
over two or even more frames. To avoid inconsistent
combinations, freeze the active settings while altering the
SPI registers by disabling synchronization for the
corresponding functionality before reconfiguration. When
all registers are uploaded, re−enable the synchronization.
The sensor’s sequencer then updates its active set of
registers and uses them for the coming frames. The freezing
of the active set of registers can be programmed in the
sync_configuration registers, which can be found at the SPI
address 206.
Figure 9 shows a re-configuration that does not use the
sync_configuration option. As depicted, new SPI
configurations are synchronized to frame boundaries.
With sync_configuration = ‘1’. Configurations are
synchronized to the frame boundaries.
Figure 10 shows the usage of the sync_configuration
settings. Before uploading a set of registers, the
corresponding sync_configuration is de-asserted. After the
upload is completed, the sync_configuration is asserted
again and the sensor resynchronizes its set of registers to the
coming frame boundaries.
As seen in the figure, this ensures that the uploads
performed at the end of frame N+2 and the start of frame
N+3 become active in the same frame (frame N+4).
Time Line
SPI Registers
Active Registers
Frame N
Frame N+1 Frame N+2 Frame N+3 Frame N+4
Figure 9. Frame Synchronization of Configurations (no freezing)
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