PZTA96ST1 Datasheet, PDF (2/8 Pages) ON Semiconductor – High Voltage Transistor

PZTA96ST1
INFORMATION FOR USING THE SOT–223 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the total
design. The footprint for the semiconductor packages must
be the correct size to insure proper solder connection
interface between the board and the package. With the
correct pad geometry, the packages will self align when
subjected to a solder reflow process.
0.15
3.8
0.079
2.0
SOT–223
0.091
2.3
0.091
2.3
0.079
2.0
0.059
1.5
0.059
1.5
0.059
1.5
0.248
6.3
mm
inches
SOT–223 POWER DISSIPATION
The power dissipation of the SOT–223 is a function of
the pad size. This can vary from the minimum pad size for
soldering to the pad size given for maximum power dissipa-
tion. Power dissipation for a surface mount device is deter-
mined by T_J(max), the maximum rated junction temperature
of the die, Rq_JA, the thermal resistance from the device
junction to ambient; and the operating temperature, T_A. Us-
ing the values provided on the data sheet for the SOT–223
package, P_D can be calculated as follows.
P_D =
T_J(max) – T_A
R_qJA
The values for the equation are found in the maximum
ratings table on the data sheet. Substituting these values into
the equation for an ambient temperature T_A of 25°C, one
can calculate the power dissipation of the device which in
this case is 1.5 watts.
P_D =
150°C – 25°C
83.3°C/W
= 1.50 watts
The 83.3°C/W for the SOT-223 package assumes the
use of the recommended footprint on a glass epoxy
printed circuit board to achieve a power dissipation of 1.5
watts. There are other alternatives to achieving higher
power dissipation from the SOT-223 package. One is to
increase the area of the collector pad. By increasing the
area of the collector pad, the power dissipation can be
increased. Although the power dissipation can almost be
doubled with this method, area is taken up on the printed
circuit board which can defeat the purpose of using
surface mount technology. A graph of R_qJA versus collec-
tor pad area is shown in Figure 1.
160
140
° 120
100
Board Material = 0.0625″
GĆ10/FRĆ4, 2 oz Copper
0.8 Watts
1.25 Watts*
T_A = 25°C
1.5 Watts
*Mounted on the DPAK footprint
80
0.0
0.2
0.4
0.6
0.8
1.0
A, Area (square inches)
Figure 1. Thermal Resistance versus Collector
Pad Area for the SOT-223 Package (Typical)
Another alternative would be to use a ceramic substrate
or an aluminum core board such as Thermal Clad™. Using
a board material such as Thermal Clad, an aluminum core
board, the power dissipation can be doubled using the same
footprint.
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