MC74VHCT139A Datasheet, PDF (2/7 Pages) ON Semiconductor – Dual 2−to−4 Decoder/ Demultiplexer

Ea 1
A0a 2
A1a 3
Y0a 4
Y1a 5
Y2a 6
Y3a 7
GND 8
16 V_CC
15 Eb
14 _A0b
13 A1b
12 Y0b
11 Y1b
10 Y2b
9 Y3b
Figure 1. Pin Assignment
MC74VHCT139A
ADDRESS
INPUTS
A0a ²
A1a ³
Ea ¹
4 _Y0a
5 _Y1a
6 _Y2a
7 _Y3a
ACTIVE−LOW
OUTPUTS
ADDRESS
INPUTS
A0b ¹⁴
A1b ¹³
12 _Y0b
11 _Y1b
10 _Y2b
9 _Y3b
ACTIVE−LOW
OUTPUTS
Eb ¹⁵
Figure 2. Logic Diagram
En
Y0
Y1
A0
Y2
Y3
A1
Figure 3. Expanded Logic Diagram
(1/2 of Device)
INPUT
Figure 4. Input Equivalent Circuit
A1a ³
A0a ²
Ea 1
A1b 13
A0b 14
Eb 15
X/Y
1
0
2
1
EN
2
3
4 Y0a
5 Y1a
6 Y2a
7 _Y3a
12 Y0b
11 Y1b
10 Y2b
9 Y3b
A1a ³
A0a ²
Ea 1
A1b 13
A0b 14
Eb 15
DMUX
0
1
G
0
3
0
1
2
3
4 Y0a
5 Y1a
6 Y2a
7 _Y3a
12 Y0b
11 Y1b
10 Y2b
9 Y3b
Figure 5. IEC Logic Diagram
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