MC74HCT574A_05 Datasheet, PDF (2/7 Pages) ON Semiconductor – Octal 3−State Noninverting D Flip−Flop with LSTTL−Compatible Inputs

MC74HCT574A
OUTPUT ₁
ENABLE
D0 2
D1 3
D2 4
D3 5
D4 6
D5 7
D6 8
D7 9
GND 10
20 V_CC
19 Q0
18 Q1
17 Q2
16 Q3
15 Q4
14 Q5
13 Q6
12 Q7
11 CLOCK
Figure 1. Pin Assignment
DATA
INPUTS
D0 ²
D1 ³
D2 ⁴
D3 ⁵
D4 ⁶
D5 ⁷
D6 ⁸
D7 ⁹
CLOCK ¹¹
OUTPUT ENABLE ¹
19 _Q0
18 _Q1
17 _Q2
16 _Q3
15 _Q4
14 _Q5
13 _Q6
12 _Q7
NON−
INVERTING
OUTPUTS
PIN 20 = V_CC
PIN 10 = GND
Figure 2. Logic Diagram
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{Design Criteria}
Value
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{Internal Gate Count*}
71.5
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{Internal Gate Propagation Delay}
1.5
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{Internal Gate Power Dissipation}
5.0
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{Speed Power Product}
0.0075
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{*Equivalent to a two−input NAND gate.}
Units
ea
ns
mW
pJ
FUNCTION TABLE
Inputs
OE Clock D
Output
Q
L
L
L
L,H,
H
X
H
H
L
L
X No Change
X
Z
X = don’t care
Z = high impedance
ORDERING INFORMATION
Device
Package
Shipping^†
MC74HCT574AN
PDIP−20
18 Units / Box
MC74HCT574ANG
PDIP−20
(Pb−Free)
18 Units / Box
MC74HCT574ADW
SOIC−20 WIDE
38 Units / Rail
MC74HCT574ADWG
SOIC−20 WIDE
(Pb−Free)
38 Units / Rail
MC74HCT574ADWR2
SOIC−20 WIDE
1000 Tape & Reel
MC74HCT574ADWR2G
SOIC−20 WIDE
(Pb−Free)
1000 Tape & Reel
MC74HCT574ADTR2
TSSOP−20*
2500 Tape & Reel
MC74HCT574ADTR2G
TSSOP−20*
2500 Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*This package is inherently Pb−Free.
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