MC74HCT373A_06 Datasheet, PDF (2/8 Pages) ON Semiconductor – Octal 3−State Noninverting Transparent Latch with LSTTL−Compatible Inputs

MC74HCT373A
LOGIC DIAGRAM
DATA
INPUTS
D0 ³
D1 ⁴
D2 ⁷
D3 ⁸
D4 ¹³
D5 ¹⁴
D6 ¹⁷
D7 ¹⁸
LATCH ENABLE ¹¹
OUTPUT ENABLE ¹
2 _Q0
5 _Q1
6 _Q2
9 _Q3
12 _Q4
15 _Q5
16 _Q6
19 _Q7
NONINVERTING
OUTPUTS
PIN 20 = V_CC
PIN 10 = GND
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{Design Criteria}
Value
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Internal Gate Count*
49
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{Internal Gate Propagation Delay}
1.5
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{Internal Gate Power Dissipation}
5.0
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ^{Speed Power Product}
0.0075
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{*Equivalent to a two−input NAND gate.}
Units
ea.
ns
mW
pJ
PIN ASSIGNMENT
OUTPUT ₁
ENABLE
Q0 2
D0 3
D1 4
20 V_CC
19 Q7
18 D7
17 D6
Q1 5
Q2 6
D2 7
16 Q6
15 Q5
14 D5
D3 8
13 D4
Q3 9
GND 10
12 Q4
11 ^LATCH
ENABLE
FUNCTION TABLE
Inputs
Output Latch
Enable Enable
L
H
L
H
L
L
H
X
Output
D
Q
H
H
L
L
X No Change
X
Z
X = don’t care
Z = high impedance
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