MC74HCT138A_15 Datasheet, PDF (2/7 Pages) ON Semiconductor – 1-of-8 Decoder/ Demultiplexer with LSTTL Compatible Inputs

MC74HCT138A
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{Design Criteria}
Value Units
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{Internal Gate Count*}
30.5 ea.
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{Internal Gate Propagation Delay}
1.5
ns
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{Internal Gate Power Dissipation}
5.0
mW
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{Speed Power Product}
.0075 pJ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{*Equivalent to a two−input NAND gate.}
FUNCTION TABLE
Inputs
Outputs
CS1CS2 CS3 A2 A1 A0 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7
X X H XXX HHHHHHH H
X H X XXX HHHHHHH H
L X X XXX HHHHHHH H
H L L LLL LHHHHHHH
H L L LLHH L HHHHHH
H L L LHL HH L HHHHH
H L L LHH H H H L H H H H
H L L HLL HHHH L HHH
H L L HLHHHHHH L HH
H L L HHL H H H H H H L H
H L L HHH H H H H H H H L
H = high level (steady state)
L = low level (steady state)
X = don’t care
MAXIMUM RATINGS
Symbol
Parameter
V_CC DC Supply Voltage (Referenced to GND)
V_in DC Input Voltage (Referenced to GND)
V_out DC Output Voltage (Referenced to GND)
I_in
DC Input Current, per Pin
I_out DC Output Current, per Pin
I_CC DC Supply Current, V_CC and GND Pins
P_D Power Dissipation in Still Air
SOIC Package†
TSSOP Package†
Value
–0.5 to +7.0
–0.5 to V_CC + 0.5
–0.5 to V_CC + 0.5
±20
±25
±50
500
450
Unit
V
V
V
mA
mA
mA
mW
T_stg Storage Temperature
–65 to +150
_C
T_L Lead Temperature, 1 mm from Case for 10 Seconds
_C
(TSSOP or SOIC Package)
260
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of
these limits are exceeded, device functionality should not be assumed, damage may occur and
reliability may be affected.
†Derating: SOIC Package: –7 mW/_C from 65_ to 125_C
TSSOP Package: −6.1 mW/_C from 65_ to 125_C
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high−impedance cir-
cuit. For proper operation, V_in and
V_out should be constrained to the
range GND v (V_in or V_out) v V_CC.
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or V_CC).
Unused outputs must be left open.
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