MC74HC273A_05 Datasheet, PDF (2/10 Pages) ON Semiconductor – Octal D Flip−Flop with Common Clock and Reset High−Performance Silicon−Gate CMOS

MC74HC273A
PIN ASSIGNMENT
LOGIC DIAGRAM
DATA
INPUTS
D0 ³
D1 ⁴
D2 ⁷
D3 ⁸
D4 ¹³
D5 ¹⁴
D6 ¹⁷
D7 ¹⁸
CLOCK ¹¹
2 _Q0
5 _Q1
6 _Q2
9 _Q3
12 _Q4
15 _Q5
16 _Q6
19 _Q7
NONINVERTING
OUTPUTS
RESET ¹
PIN 20 = V_CC
PIN 10 = GND
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{Design Criteria}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{Internal Gate Count*}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{Internal Gate Propagation Delay}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{Internal Gate Power Dissipation}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{Speed Power Product}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ^{*Equivalent to a two−input NAND gate.}
Value
66
1.5
5.0
.0075
Units
ea
ns
mW
pJ
RESET 1
Q0 2
D0 3
D1 4
Q1 5
Q2 6
D2 7
D3 8
Q3 9
GND 10
20 V_CC
19 Q7
18 D7
17 D6
16 Q6
15 Q5
14 D5
13 D4
12 Q4
11 CLOCK
FUNCTION TABLE
Inputs
Output
Reset Clock D
Q
L
X
X
L
H
H
H
H
L
L
H
L
X No Change
H
X No Change
ORDERING INFORMATION
Device
Package
Shipping^†
MC74HC273AN
PDIP−20
18 Units / Rail
MC74HC273ANG
PDIP−20
(Pb−Free)
18 Units / Rail
MC74HC273ADW
SOIC−20 WIDE
38 Units / Rail
MC74HC273ADWG
SOIC−20 WIDE
(Pb−Free)
38 Units / Rail
MC74HC273ADWR2
SOIC−20 WIDE
1000 Tape & Reel
MC74HC273ADWR2G
SOIC−20 WIDE
(Pb−Free)
1000 Tape & Reel
MC74HC273ADT
MC74HC273ADTG
TSSOP−20*
TSSOP−20*
75 Units / Rail
75 Units / Rail
MC74HC273ADTR2
TSSOP−20*
2500 Tape & Reel
MC74HC273ADTR2G
MC74HC273AF
TSSOP−20*
SOEIAJ−20
2500 Tape & Reel
40 Units / Rail
MC74HC273AFG
SOEIAJ−20
(Pb−Free)
40 Units / Rail
MC74HC273AFEL
SOEIAJ−20
2000 Tape & Reel
MC74HC273AFELG
SOEIAJ−20
(Pb−Free)
2000 Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*This package is inherently Pb−Free.
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