CM1263-06DE_13 Datasheet, PDF (2/4 Pages) ON Semiconductor – Low Capacitance ESD Protection for High-Speed Serial Interfaces

CM1263−06DE
Table 1. PIN DESCRIPTIONS
Pin
Description
1
V_N*
2
(CH1) ESD Channel #1
3
V_N*
4
V_N*
5
(CH2) ESD Channel #2
6
V_N*
7
(CH3) ESD Channel #3
8
V_P2 for Channels 2, 3, and 4
9
(CH4) ESD Channel #4
10
(CH5) ESD Channel #5
11
V_P1 for Channels1, 5, and 6
12
(CH6) ESD Channel #6
DAP*
Backside, GND Pad, V_N*
PACKAGE / PINOUT DIAGRAM
Top View
(Pins Down View)
12 11 10 9 8 7
Pin 1
Marking
JK12
123 45 6
Bottom View
(Pins Up View)
123 45 6
GND
PAD
12 11 10 9 8 7
12−Lead UDFN Package
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2