CM1215 Datasheet, PDF (2/9 Pages) California Micro Devices Corp – 1-, 2- and 4-Channel Low Capacitance ESD Arrays

V_P
CH1
V_N
CM1215−01SO
CM1215
BLOCK DIAGRAM
V_P
CH1
CH2
V_N
CM1215−02SO
CM1215−02SR
CH4 V_P CH3
CH1 V_N CH2
CM1215−04SO
PACKAGE / PINOUT DIAGRAMS
Top View
CH1 1
3 V_N
V_P 2
3−Pin SOT23−3
Top View
V_N 1 4 V_P
CH1 2 3 CH2
4−Pin SOT143
Top View
NC 1 5 V_P
V_N 2
CH1 3 4 CH2
5−Lead SOT23−5
Top View
CH1 1 6
CH4
V_N
CH2
25
34
V_P
CH3
6−Pin SOT23−6
Table 1. PACKAGE PIN DESCRIPTIONS
SOT23−3
SOT143
Pin Name
Pin No.
Pin No.
CH1
1
2
V_N
3
1
CH2
−
3
CH3
−
−
V_P
2
4
CH4
−
−
N/C
−
−
SOT23−5
Pin No.
3
2
4
−
5
−
1
SOT23−6
Pin No.
1
2
3
4
5
6
−
Type
I/O
GND
I/O
I/O
PWR
I/O
−
Description
ESD Channel
Negative voltage supply rail
ESD Channel
ESD Channel
Positive voltage supply rail
ESD Channel
No Connection
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