CM1213_13 Datasheet, PDF (2/9 Pages) ON Semiconductor – 6 and 8-Channel Low Capacitance ESD Protection Arrays

CM1213
Table 1. PIN DESCRIPTIONS
6−Channel, 8−Lead MSOP−8/SOIC−8 Packages
Pin Name
Type
Description
1 CH1
I/O
ESD Channel
2 CH2
I/O
ESD Channel
3
V_N
4 CH3
GND
I/O
Negative voltage supply rail
ESD Channel
5 CH4
I/O
ESD Channel
6 CH5
I/O
ESD Channel
7
V_P
8 CH6
PWR
I/O
Positive voltage supply rail
ESD Channel
8−Channel, 10−Lead MSOP−10 Package
Pin Name
Type
Description
1 CH1
I/O
ESD Channel
2 CH2
I/O
ESD Channel
3 CH3
I/O
ESD Channel
4 CH4
I/O
ESD Channel
5
V_N
6 CH5
GND
I/O
Negative voltage supply rail
ESD Channel
7 CH6
I/O
ESD Channel
8
V_P
9 CH7
PWR
I/O
Positive voltage supply rail
ESD Channel
10 CH8
I/O
ESD Channel
PACKAGE / PINOUT DIAGRAMS
Top View
CH1
CH2
V_N
CH3
1
8
2
7
3
6
4
5
CH6
V_P
CH5
CH4
8−Lead SOIC−8
Top View
CH1
CH2
V_N
CH3
1
8
2
7
3
6
4
5
CH6
V_P
CH5
CH4
8−Lead MSOP−8
Top View
CH1
CH2
CH3
CH4
V_N
1 10
2
9
3
8
4
7
5
6
CH8
CH7
V_P
CH6
CH5
10−Lead MSOP−10
GENERIC MARKING DIAGRAMS
CM1213−06SM
CM1213−06MR
CM1213−08MR
D136
YYWW
XXXX
D137
XXXXX
YYWW
D138
XXXXX
YYWW
XXXXX = Lot Number
YY
= Year
WW
= Work Week
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