CAT24C44LI-G Datasheet, PDF (2/9 Pages) ON Semiconductor – 256-Bit Serial Nonvolatile CMOS Static RAM

CAT24C44
BLOCK DIAGRAM
ROW
DECODE
EEPROM ARRAY
STATIC RAM
ARRAY
256-BIT
RECALL
STORE
CE
DI
INSTRUCTION
REGISTER
COLUMN
DECODE
SK
INSTRUCTION
DECODE
4-BIT
COUNTER
CONTROL
LOGIC
STORE
RECALL
DO
VCC
VSS
MODE SELECTION⁽¹⁾⁽²⁾
Mode
Hardware Recall⁽³⁾
Software Recall
Hardware Store⁽³⁾
Software Store
X = Don’t Care
STORE
1
1
0
1
RECALL
0
1
1
1
POWER-UP TIMING⁽⁴⁾
Symbol
Parameter
VCCSR
V_CC Slew Rate
t_pur
Power-Up to Read Operations
t_puw
Power-Up to Write or Store Operation
Software
Instruction
NOP
RCL
NOP
STO
Write Enable Previous Recall
Latch
Latch
X
X
X
X
SET
TRUE
SET
TRUE
Min.
0.5
Max.
0.005
200
5
Units
V/m
µs
ms
Note:
(1) The store operation has priority over all the other operations.
(2) The store operation is inhibited when V_CC is below ≈ 3.5V.
(3) NOP designates that the device is not currently executing an instruction.
(4) This parameter is tested initially and after a design or process change that affects the parameter.
Doc. No. MD-1083, Rev. T
2
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Characteristics subject to change without notice