AND8048 Datasheet, PDF (2/8 Pages) ON Semiconductor – Dual P-Channel 1.8 V (G-S) MOSFET

AND8048/D
MODEL EVALUATION
P–CHANNEL DEVICE (T_J = 25°C unless otherwise noted)
Characteristic
Symbol
Static
Gate Threshold Voltage
On–State Drain Current (Note 1.)
Drain–Source On–State Resistance (Note 1.)
V_GS(th)
I_D(on)
r_DS(on)
Forward Transconductance (Note 1.)
Diode Forward Voltage (Note 1.)
Dynamic (Note 2.)
Total Gate Charge
Gate–Source Charge
Gate–Drain Charge
Turn–On Delay Time
Rise Time
Turn–Off Delay Time
Fall Time
Source–Drain Reverse Recovery Time
1. Pulse test: pulse width  300 ms, duty cycle  2%.
2. Guaranteed by design, not subject to production testing.
g_fs
V_SD
Q_g
Q_gs
Q_gd
t_d(on)
t_r
t_d(off)
t_f
t_rr
Test Conditions
V_DS = V_GS, I_D = –250 mA
V_DS  –5.0 V, V_GS = 4.5 V
V_GS = –4.5 V, I_D = –3.0 A
V_GS = –2.5 V, I_D = –2.5 A
V_GS = –1.8 V, I_D = –1.0 A
V_DS = 5.0 V, I_D = 3.0 A
I_S = –0.9 A, V_GS = 0.0 V
V_DS = –4.0 V, V_GS = –4.5 V, I_D = –3.0 A
V_DD = –4.0 V, R_L = 4.0 W, I_D ^ –1.0 A,
V_GEN = –4.5 V, R_G = 6.0 W
I_F = –0.9 A, di/dt = 100 A/ms
Typical Unit
0.83
V
36
A
0.080
0.110
W
0.142
7.6
S
–0.80
V
35
0.5
nC
1.5
13
19
24
ns
12
28
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