74LVC126A Datasheet, PDF (2/9 Pages) NXP Semiconductors – Quad buffer/line driver with 5 Volt tolerant input/outputs; 3-state

V_CC OE3 D3 O3 OE2 D2 O2
14 13 12 11 10 9 8
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OE0 D0 O0 OE1 D1 O1 GND
Figure 1. Pinout: 14−Lead (Top View)
74LVC126A
1
OE0
2
D0
4
OE1
5
D1
10
OE2
3
9
O0 D2
13
OE3
6
12
O1 D3
8
O2
11
O3
Figure 2. Logic Diagram
PIN NAMES
Pins
OEn
Dn
On
Function
Output Enable Inputs
Data Inputs
3−State Outputs
TRUTH TABLE
INPUTS
OUTPUTS
OEn
Dn
On
H
L
L
H
H
H
L
X
Z
H = High Voltage Level
L = Low Voltage Level
Z = High Impedance State
X = High or Low Voltage Level and Transitions Are
Acceptable; for I_CC reasons, DO NOT FLOAT Inputs
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