74LVC126A Datasheet, PDF (1/9 Pages) NXP Semiconductors – Quad buffer/line driver with 5 Volt tolerant input/outputs; 3-state

74LVC126A
Low-Voltage CMOS
Quad Buffer
With 5 V−Tolerant Inputs and Outputs
(3−State, Non−Inverting)
The 74LVC126A is a high performance, non−inverting quad buffer
operating from a 1.2 to 3.6 V supply. High impedance TTL compatible
inputs significantly reduce current loading to input drivers while TTL
compatible outputs offer improved switching noise performance. A V_I
specification of 5.5 V allows 74LVC126A inputs to be safely driven
from 5.0 V devices. The 74LVC126A is suitable for memory address
driving and all TTL level bus oriented transceiver applications.
Current drive capability is 24 mA at the outputs. The Output Enable
(OEn) inputs, when HIGH, disable the outputs by placing them in a
HIGH Z condition.
Features
• Designed for 1.2 to 3.6 V V_CC Operation
• 5.0 V Tolerant − Interface Capability With 5.0 V TTL Logic
• Supports Live Insertion and Withdrawal
• I_OFF Specification Guarantees High Impedance When V_CC = 0 V
• 24 mA Output Sink and Source Capability
• Near Zero Static Supply Current in all Three Logic States (10 mA)
Substantially Reduces System Power Requirements
• ESD Performance: Human Body Model >2000 V
Machine Model >200 V
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
www.onsemi.com
MARKING
DIAGRAMS
14
1
14
SOIC−14
D SUFFIX
CASE 751A
1
LVC126AG
AWLYWW
14
1
TSSOP−14
DT SUFFIX
CASE 948G
14
LVC
126A
ALYWG
G
1
A
L, WL
Y, YY
W, WW
G or G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
© Semiconductor Components Industries, LLC, 2015
1
October, 2015 − Rev. 0
Publication Order Number:
74LVC126A/D