LB11923V Datasheet, PDF (18/20 Pages) Sanyo Semicon Device – Three-Phase Brushless Motor Driver

LB11923V
When V_CC = 6.3 V: The set time (in seconds) is 37 × C (µF)
When V_CC = 5.0 V: The set time (in seconds) is 30 × C (µF)
To clear the rotor constrained protection state, the application must either switch to the stop state for a fixed period
(about 1 ms or longer) or turn off and reapply power.
If the rotor constrained protection circuit is not used, a 220 kΩ resistor and a 1500 pF capacitor must be connected in
parallel between the CSD pin and ground. However, in that case, the clock disconnect protection circuit described
below will no longer function. Since the CSD pin also functions as the power-on reset pin, if the CSD pin were
connected directly to ground, the IC would go to the power-on reset state and motor drive operation would remain
off. The power-on reset state is cleared when the CSD pin voltage rises above a level of about 0.64 V.
11. Clock Disconnect Protection Circuit
If the clock input goes to the no input state when the IC is in the start state, this protection circuit will operate and
turn off the PWM output. If the clock is resupplied before the motor constraint protection circuit operates, the IC will
return to the drive state, but if the motor constraint protection circuit does operate, the IC must either be set
temporarily (approximately 1 ms or over) to the stop or brake state, or the power must be turned off and reapplied.
12. Low-Voltage Protection Circuit
The LB11923V includes a low-voltage protection circuit to protect against incorrect operation when power is first
applied or if the power-supply voltage (V_CC) falls. The (external) all output transistors are turned off if V_CC falls
under about 3.75 volts, and this function is cleared at about 4.0 volts.
13. Power Supply Stabilization
Since this IC is used in applications that draw large output currents, the power-supply line is subject to fluctuations.
Therefore, capacitors with capacitances adequate to stabilize the power-supply voltage must be connected between
the V_CC pin and ground. If diodes are inserted in the power-supply line to prevent IC destruction due to reverse
power supply connection, since this makes the power-supply voltage even more subject to fluctuations, even larger
capacitors will be required.
14. Ground Lines
The signal system ground and the output system ground must be separated and a single ground point must be taken at
the connector. Since the output system ground carries large currents, this ground line must be made as short as
possible.
Output system ground ... Ground for R_f and the output diodes
Signal system ground ... Ground for the IC and the IC external components
15. V_REG Pin
If a motor drive system is formed from a single power supply, the V_REG pin (pin 1) can be used to create the power-
supply voltage (about 6.3 V) for this IC. The V_REG pin is a shunt regulator and generates a voltage of about 7 volts by
passing a current through an external resistor. A stable voltage can be generated by setting the current to value in the
range 0.2 to 1.5 mA. The external transistors must have current capacities of at least 80 mA (to cover the I_CC + Hall
bias current + output current <source> requirements) and they must have voltage handling capacities in excess of the
motor power-supply voltage. Since the heat generated by these transistor may be a problem, heat sinks may be
required depending on the packages used. If the IC power-supply voltage (4.4 to 7.0 V) is provided from an external
circuit, apply that voltage directly to the V_CC pin(pin 37 and pin 38). In that case, the V_REG pin must either be left
open or connected to ground.
16. FG Amplifier
The FG amplifier is normally implemented as a filter amplifier such as that shown in the application circuits to reject
noise. Since a clamp circuit has been added at the FG amplifier output, the output amplitude is clamped at about
3 V p-p, even if the gain is increased.
Since a Schmitt comparator is inserted after the FG amplifier, applications must set the gain so that the amplifier
output amplitude is at least 250 mV p-p. (It is desirable that the gain be set so that the amplitude is over 0.5 V p-p at
the lowest controlled speed to be used.)
The capacitor inserted between the FGIN⁺ pin (pin 23) and ground is required for bias voltage stabilization. To make
the connected capacitor as immune from noise as possible, connect this capacitor to the GND pin (pin 29 and pin 30)
with a line that is as short as possible.
No. 7498-18/20