LC75843UGA Datasheet, PDF (17/35 Pages) ON Semiconductor – Duty General-Purpose LCD Driver

LC75843UGA
Control Data Functions
(1) DT0, DT1    LCD drive scheme ( 1/1-duty to 1/4-duty drive ) switching control data.
These control data bits select 1/4-duty 1/3 bias drive, 1/3-duty 1/3 bias drive, 1/2-duty 1/2 bias drive, or 1/1-duty
drive.
DT0
DT1
Drive scheme
COM2/S27
Pin state
COM3/S26
COM4/S25
0
0
1/4-duty 1/3-bias drive
COM2
COM3
COM4
1
0
1/3-duty 1/3-bias drive
COM2
COM3
S25
0
1
1/2-duty 1/2-bias drive
COM2
S26
S25
1
1
static (1/1-duty drive)
S27
S26
S25
Note: COM2 to COM4: Common output , S27 to S25: Segment output
(2) PF0 to PF3    PWM output waveform frame frequency setting control data
These control data bits set the frame frequency of the PWM output waveforms. However, when the PWM output
function isn’t used, these control data bits become invalid. In addition, when the external clock operating frequency
is set the fCK2=38[KHz] typ (EXF=“1”) in external clock operating mode (OC=“1”), these control data bits become
invalid.
Control data
PWM output waveform frame frequency fp[Hz]
PF0
PF1
PF2
PF3
0
0
0
0
Internal oscillator operating mode
(The control data OC is 0,
fosc=300[kHz]typ)
fosc/1536
External clock operating mode
(The control data OC is 1,
and EXF is 0, fCK1=300[kHz]typ)
fCK1/1536
1
0
0
0
fosc/1408
fCK1/1408
0
1
0
0
fosc/1280
fCK1/1280
1
1
0
0
fosc/1152
fCK1/1152
0
0
1
0
1
0
1
0
fosc/1024
fosc/896
fCK1/1024
fCK1/896
0
1
1
0
1
1
1
0
fosc/768
fosc/640
fCK1/768
fCK1/640
0
0
0
1
1
0
0
1
fosc/512
fosc/384
fCK1/512
fCK1/384
0
1
0
1
fosc/256
fCK1/256
Note: When is setting (PF0, PF1, PF2, PF3)=(1, 1, 0, 1) and (X, X, 1, 1), the frame frequency is same as
frame frequency at the time of the (PF0, PF1, PF2, PF3)=(1, 0, 1, 0) setting (fosc/896, fCK1/896).
X : don’t care
No.A2226-17/35