NCP1615_16 Datasheet, PDF(16/46 Page) ON Semiconductor – High Voltage High Efficiency Power Factor Correction Controller

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NCP1615_16 Datasheet, PDF (16/46 Pages) ON Semiconductor – High Voltage High Efficiency Power Factor Correction Controller

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NCP1615

SKIP MODE

As illustrated in Figure 6 the circuit also skips cycles near

the line zero crossing where the current is very low and

subsequently the voltage across RFF is low. A comparator

monitors VFFcontrol and inhibits the switching operation

when VFFcontrol falls below the skip level, Vskip(in), typically

0.65 V. Switching resumes when VFFcontrol exceeds the skip

exit threshold, Vskip(out), typically 0.75 V (100 mV

hysteresis). This function disables the driver to reduce

power dissipation when the power transfer is particularly

inefficient at the expense of slightly increased input current

distortion. When superior power factor is needed, this

DRV

CS / ZCD

Zero Current Detection

200 us delay

(watchdog)

DRV

function can be inhibited offsetting the FFcontrol pin by

0.75 V. The skip mode capability is disabled whenever the

PFC stage is not in nominal operation represented by the

PFCOK signal.

The circuit does not abruptly interrupt the switching when

VFFcontrol falls below Vskip(in). Instead, the signal VTON that

controls the on time is gradually decreased by grounding the

VREGUL signal applied to the VTON processing block shown

in Figure 11. Doing so, the on time smoothly decays to zero

in 3 to 4 switching periods typically. Figure 7 shows the

practical implementation of the FFcontrol circuitry.

Deadâtime (DT)

Detection DT

DRV R

Ramp For DT Control

SUM

FFcontrol

Vzcd(th)

TimeOut

delay

CLK

DRV

Clock Generation

2.5 V

Figure 7. CCFF Practical Implementation

CCFF maximizes the efficiency at both nominal and light

load. In particular, the standby losses are reduced to a

minimum. Also, this method avoids that the system stalls or

jumps between drain voltage valleys. Instead, the circuit acts

so that the PFC stage transitions from the n valley to (n + 1)

valley or vice versa from the n valley to (n â 1) cleanly as

illustrated by Figure 8.

Figure 8. Valley Transitions Without Valley Jumping

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