NCP1060 Datasheet, PDF (16/30 Pages) ON Semiconductor – High-Voltage Switcher

NCP1060, NCP1063
10
9
9.0 V
8
7
6
V_CC
7.5 V
5
4
3
2
V_CCTH
1
Device
Internal
Pulses
0
0
1
2
3
4
5
6
7
8
Startup Duration
TIME (ms)
Figure 32. The Charge/Discharge Cycle Over a 1 mF V_CC Capacitor
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10
As one can see, even if there is auxiliary winding to provide
energy for V_CC, it happens that the device is still biased by
DSS during start−up time or some fault mode when the
voltage on auxiliary winding is not ready yet. The V_CC
capacitor shall be dimensioned to avoid V_CC crosses V_CC(off)
level, which stops operation. The ΔV between V_CC(min) and
V_CC(off) is 0.5 V. There is no current source to charge V_CC
capacitor when driver is on, i.e. drain voltage is close to zero.
Hence the V_CC capacitor can be calculated using
C_VCC
w
I_CC1 @ D_max
f_OSC @ DV
(eq. 1)
Take the 60 kHz device as an example. C_VCC should be
above
0.8 m @ 72%
54 kHz @ 0.5
+
21
nF.
A margin that covers the temperature drift and the voltage
drop due to switching inside FET should be considered, and
thus a capacitor above 0.1 mF is appropriate.
The V_CC capacitor has only a supply role and its value
does not impact other parameters such as fault duration or
the frequency sweep period for instance. As one can see on
Figure 31, an internal OVP comparator, protects the
switcher against lethal V_CC runaways. This situation can
occur if the feedback loop optocoupler fails, for instance,
and you would like to protect the converter against an over
voltage event. In that case, the over voltage protection
(OVP) circuit and immediately stops the output pulses for
t_recovery duration (400 ms typically). Then a new start−up
attempt takes place to check whether the fault has
disappeared or not. The OVP paragraph gives more design
details on this particular section.
Fault Condition – Short−circuit on V_CC
In some fault situations, a short−circuit can purposely
occur between V_CC and GND. In high line conditions (V_HV
= 370 V_DC) the current delivered by the startup device will
seriously increase the junction temperature. For instance,
since I_start1 equals 5 mA (the min corresponds to the highest
T_j), the device would dissipate 370 x 5 m = 1.85 W. To avoid
this situation, the controller includes a novel circuitry made
of two startup levels, I_start1 and I_start2. At power−up, as long
as V_CC is below a 1.4 V level, the source delivers I_start2
(around 500 mA typical), then, when V_CC reaches 1.4 V, the
source smoothly transitions to I_start1 and delivers its nominal
value. As a result, in case of short−circuit between V_CC and
GND, the power dissipation will drop to 370 x 500 m =
185 mW. Figure 32 portrays this particular behavior.
The first startup period is calculated by the formula C x V
= I x t, which implies a 1 m x 1.4 / 500 m = 2.8 ms startup time
for the first sequence. The second sequence is obtained by
toggling the source to 8 mA with a delta V of V_CC(on) –
V_CCTH = 9.0 – 1.4 = 7.6 V, which finally leads to a second
startup time of 1 m x 7.6 / 8 m = 0.95 ms. The total startup
time becomes 2.8 m + 0.95 m = 3.75 ms. Please note that this
calculation is approximated by the presence of the knee in
the vicinity of the transition.
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