LC898240_16 Datasheet, PDF (16/23 Pages) ON Semiconductor – High Efficient Stepper Motor Controller

LC898240
SOSTG step out detection setting
(R/W)
Address Default
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
0017h
00h
-
-
-
-
-
SOMD
SONUM
SOMD
SOMD = 0: set the flag STPOUT = 1 whenever the step out is detected
SOMD = 1: latch the flag STPOUT = 1 when the step out is detected, and clear the flag by RST or ST reset
SONUM
The step out detection qualifier: when the event consecutively repeated for the following number of times, the step
out detection is flagged.
SONUM = 0h: once
SONUM = 1h: twice
SONUM = 2h: 8 times
SONUM = 3h: 16 times
GADMAX
upper limit of VREFO level (R/W)
Address Default
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
0018h
00h
GADMAX[7:0]
Upper limit of VREFO voltage level
𝐺𝐺𝐺𝐺𝐺𝐺𝐺𝐺𝐺𝐺
𝑉𝑉 = 𝑉𝑉_{𝐹𝐹𝐹𝐹} × ₂₅₆
GADMAX[7:0]
GADSTOP
VREFO level setting at motor stop
(R/W)
Address Default
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
0019h
00h
GADSTOP[7:0]
GADSTOP
VREFO voltage level during motor stop (RDY = L and MACT L)
𝐺𝐺𝐺𝐺𝐺𝐺𝐺𝐺
𝑉𝑉_{𝑆𝑆𝑆𝑆𝑆𝑆} = 𝑉𝑉_{𝐹𝐹𝐹𝐹} × ₂₅₆
GADSTOP value must be equal to or less than GADMAX. If this function is not used, set the same value to
GADSTOP as GADMAX.
GADSTAT
FF value (R/W)
Address Default
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
001Ah
00h
GADSTAT[7:0]
GADSTAT
The initial value of VREFO for the high efficient mode as feedforward control
𝐺𝐺𝐺𝐺𝐺𝐺
𝑉𝑉_{𝐹𝐹𝐹𝐹} = 𝑉𝑉_{𝐹𝐹𝐹𝐹} × ₂₅₆
GADSTAT value must be equal to or less than GADMAX. If this function is not used, set the same value to
GADSTAT as GADMAX.
ADTDLT AD increment value target (R/W)
Address Default
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
001Bh
00h
See the illustration below.
ADTDLT[7:0]
ADTBSE AD base value target
(R/W)
Address Default
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
001Ch
00h
See the illustration below.
ADTBSE[7:0]
ADTLIM AD minimum value target (R/W)
Address Default
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
001Dh
00h
See the illustration below.
ADTLIM[7:0]
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