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LC898240_16 Datasheet, PDF (14/23 Pages) ON Semiconductor – High Efficient Stepper Motor Controller
LC898240
FR_REG
Outputs FR signal from the pin FR during the register control mode
During IO port control mode, FR_REG is ignored.
MD_REG[2:0]
Outputs MD signal from the pins MD2, MD1 and MD0 during the register control mode
During IO port control mode, MD_REG is ignored.
GCKRTOclock setting
(R/W)
Address Default
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
0012h
00h
-
-
GCKRTO[5:0]
GCKRTO[5:0]
Defines the ratio between CLK and virtual clock (GCK = 840kHz)
í µí±“í µí µí±“í±”í µí±”í µí±”í µí±”í µí±”í µí±”
𝑓𝑓𝑐𝑐
=
2−1𝐺𝐺𝐺𝐺𝐺𝐺𝐺𝐺𝐺𝐺[5]
+
2−2𝐺𝐺𝐺𝐺𝐺𝐺𝐺𝐺𝐺𝐺[4]
+
⋯
+
2−6𝐺𝐺𝐺𝐺𝐺𝐺𝐺𝐺𝐺𝐺[0]
For example, in case of a clock of 4MHz at the pin CLK,
í µí±“í µí µí±“í±”í µí±”í µí±”í µí±”í µí±”í µí±” = 0.84 = 0.21
𝑓𝑓𝑐𝑐
4
𝐺𝐺𝐺𝐺𝐺𝐺𝐺𝐺𝐺𝐺[5: 0] = 0Dh → 0.203125
The virtual step pulse velocity is defined by,
í µí±“í µVí±“ STP
=
𝑓𝑓𝑐𝑐
×
í µí±“í µí µí±“í±†í µí±†í µí±†í µí±†í µí±†í µí±† × í µí±“í µí µí±“í±”í µí±”í µí±”í µí±”í µí±”í µí±”
𝐺𝐺𝐺𝐺𝐺𝐺𝐺𝐺𝐺𝐺[5: 0]
×
𝑘𝑘𝑀𝑀
í µí±“í µí µí±“í±‰í µí±‰: virtual step pulse velocity [pps]
í µí±“í µí µí±“í±†í µí±†í µí±†í µí±†í µí±†í µí±†: step pulse velocity [pps]
𝑘𝑘𝑀𝑀: excitation mode factor (1 for half, 2 for quarter, 4 for 1/8 and 8 for 1/16 step)
GADSLIM
speed setting for smooth stepper mode (R/W)
Address Default
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
0013h
00h
-
GADAC
GADSLIM[5:0]
GADAC
The high efficient mode (adoptive current control) and the acceleration control works concurrently.
GADAC = 0: not concurrent
GADAC = 1: high efficient mode activated after the acceleration completed
GADSLIM
The high efficient mode is activated when the motor speed is faster than the speed specified by GADSLIM.
For example, to specify the virtual step pulse speed threshold 1900pps, set 0Bh for GADSLM[5:0].
GPSTG initial setting for high efficient mode (R/W)
Address Default
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
0014h
00h
-
GADPHS
GADNUM[1:0]
GADPHS
Defines the motor signal for OUTAI and OUTBI
GADPHS = 0: phase B (phase OUT2)
GADPHS = 1: phase A (phase OUT1)
GADNUM
VREFO control frequency (over sampling)
GADNUM = 0h: default
GADNUM = 1h: 2x
GADNUM = 2h: 4x
GADNUM = 3h: 8x
OVPSLIM
ADCI waveform tuning
OVPSLIM[3:0]
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