AX8052F143_17 Datasheet, PDF (15/45 Pages) ON Semiconductor – SoC Ultra-Low Power RF-Microcontroller

AX8052F143
Table 14. RECEIVER AND TRANSMITTER SETTLING PHASES
Symbol
Description
Condition
Min
T_xtal
XTAL settling time
Powermodes:
POWERDOWN to STANDBY
Note that T_xtal depends on the specific
crystal used.
T_synth
Synthesizer settling time
Powermodes:
STANDBY to SYNTHTX or SYNTHRX
T_tx
TX settling time
Powermodes:
0
SYNTHTX to FULLTX
T_tx is the time used for power ramping, this
can be programmed to be 1 x t_bit, 2 x t_bit,
4 x t_bit or 8 x t_bit.
Note 1
T_{rx_init}
RX initialization time
T_{rx_rssi}
RX RSSI acquisition time
(after T_{rx_init})
Powermodes:
SYNTHRX to FULLRX
T_{rx_preambl-}
e
RX signal acquisition time to
valid data RX at full sensitivi-
ty/selectivity
(after T_{rx_init})
Modulation (G)FSK
Note 1
1. t_bit depends on the datarate, e.g. for 10 kbps t_bit = 100 ms
Typ
Max Units
0.5
ms
40
ms
1 x t_bit 8 x t_bit
ms
150
ms
80 +
ms
3 x t_bit
9 x t_bit
Table 15. OVERALL STATE TRANSITION TIMES
Symbol
Description
Condition
T_{tx_on}
TX startup time
Powermodes:
STANDBY to FULLTX
Note 1
T_{rx_on}
RX startup time
Powermodes:
STANDBY to FULLRX
T_{rx_rssi}
RX startup time to valid RSSI
Powermodes:
STANDBY to FULLRX
T_{rx_data}
RX startup time to valid data at full
sensitivity/selectivity
Modulation (G)FSK
Note 1
T_rxtx
RX to TX switching
Powermodes:
FULLRX to FULLTX
T_txrx
TX to RX switching
(to preamble start)
Powermodes:
FULLTX to FULLRX
T_hop
Frequency hop
Switch between frequency de-
fined in register AX5043_FRE-
QA and AX5043_FREQB
1. t_bit depends on the datarate, e.g. for 10 kbps t_bit = 100 ms
Min
Typ
Max Units
40
40 + 1 x t_bit
ms
190
ms
270 +
ms
3 x t_bit
190 +
ms
9 x t_bit
62
ms
200
30
ms
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