CS5165H Datasheet, PDF (14/21 Pages) Cherry Semiconductor Corporation – Fast, Precise 5-Bit Synchronous Buck Controller for the Next Generation Low Voltage Pentium II Processors

CS5165H
M 25.0 ms
Trace 4− 5.0 V Supply Voltage (2.0 V/div.)
Trace 3− Soft Start Timing Capacitor (1.0 V/div.)
Trace 2− Inductor Switching Node (2.0 V/div.)
Figure 18. Demonstration Board Hiccup Mode Short
Circuit Protection. Gate Pulses are Delivered While
the Soft Start Capacitor Charges, and Cease During
Discharge
implement the OVP function. If a dedicated OVP output is
required, it can be implemented using the circuit in Figure
22. In this figure the OVP signal will go high (overvoltage
condition), if the output voltage (V_CORE) exceeds 20% of
the voltage set by the particular DAC code and provided that
PWRGD is low. It is also required that the overvoltage
condition be present for at least the PWRGD delay time for
the OVP signal to be activated. The resistor values shown in
Figure 22 are for V_DAC = +2.8 V (DAC = 10111). The V_OVP
(overvoltage trip−point) can be set using the following
equation:
ǒ Ǔ VOVP
+ VBEQ3
1
)
R2
R1
M 50.0 μs
Trace 4− 5.0 V from PC Power Supply (2.0 V/div.)
Trace 2− Inductor Switching Node (2.0 V/div.)
Figure 19. Demonstration Board Startup with
Regulator Output Shorted To Ground
Overvoltage Protection
Overvoltage protection (OVP) is provided as result of the
normal operation of the V² control topology and requires no
additional external components. The control loop responds
to an overvoltage condition within 100 ns, causing the top
MOSFET to shut off, disconnecting the regulator from it’s
input voltage. The bottom MOSFET is then activated,
resulting in a “crowbar” action to clamp the output voltage
and prevent damage to the load (see Figures 20 and 21 ). The
regulator will remain in this state until the overvoltage
condition ceases or the input voltage is pulled low. The
bottom FET and board trace must be properly designed to
M 10.0 μs
Trace 4− 5.0 V from PC Power Supply (5.0 V/div.)
Trace 1− Regulator Output Voltage (1.0 V/div.)
Trace 2− Inductor Switching Node 5.0 V/div.)
Figure 20. OVP Response to an Input−to−Output
Short Circuit by Immediately Providing 0% Duty
Cycle, Crow−Barring the Input Voltage to Ground
M 5.00 ms
Trace 4− 5.0 V from PC Power Supply (2.0 V/div.)
Trace 1− Regulator Output Voltage (1.0 V/div.)
Figure 21. OVP Response to an Input−to−Output Short
Circuit by Pulling the Input Voltage to Ground
http://onsemi.com
14