LV5239TA Datasheet, PDF (11/28 Pages) ON Semiconductor – 24-channel LED Driver

LV5239TA
Serial Bus Communication Specifications
1) Serial bus transfer timing conditions
Parameter
Cycle time
Data setup time
Data hold time
Pulse width
Symbol
Conditions
Min.
Typ.
tcy1
SCLK clock period
200
-
ts0
SDEN setup time relative to the rise of SCLK
90
-
ts1
SDATA setup time relative to the rise of SCLK
60
-
th0
SDEN hold time relative to the fall of SCLK
200
-
th1
SDATA hold time relative to the fall of SCLK
60
-
tw1L
Low period pulse width of SCLK
90
-
tw1H
High period pulse width of SCLK
90
-
tw2L
Low period pulse width of SDEN
1
-
Max.
Unit
-
ns
-
ns
-
ns
-
ns
-
ns
-
ns
-
ns
-
s
2) 3-wire serial bus transfer formats
LV5239TA receives the command by communication format by 3 line type serial communication of SCLK,
SDATA, and SDEN.
When SCLK stops in “L” level
When SCLK stops in “H” level
Data length : 24bits
Clock frequency : 5MHz or less
When 24 SCLK clock signals have been input during the high period of SDEN, the SDATA is taken in at the rising
edge of SCLK.
Note: If the number of SCLK clock signals during the high period of SDEN is 23 or less, SDATA is not taken in. If it
is 25 or more, the register address is automatically incremented every time 1byte is taken in.
Data organization
The slave address is assigned by the first byte, and the register address on the serial map is specified by the next byte.
The third byte transfers the data to the address specified by the register address that was written by the second byte and
if the data subsequently continues even after this, the register address is automatically incremented for the fourth and
subsequent bytes. As a result, it is possible to send the data continuously from the specified addresses. Data of less than
one byte is ignored. However, when the address reaches 1fh, the next byte to be transferred becomes 00h.
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