CAT9534 Datasheet, PDF (11/16 Pages) ON Semiconductor – 8-bit I²C and SMBus I/O Port with Interrupt

CAT9534
INTERRUPT OUTPUT
CAT9534’s interrupt otuput is an active LOW open-
drain output that is activated when any port pin
configured as an input changes state. The interrupt
output is reset when the input returns to its previous
state or the Input Port Register is read.
Note that changing an I/O from an output to an input
may cause a false interrupt to occur if the state of
the pin does not match the contents of the Input Port
register.
POWER-ON RESET OPERATION
When the power supply is applied to V_CC pin, an
internal power-on reset pulse holds the CAT9534 in
a reset state until V_CC reaches V_POR level. At this
point, the reset condition is released and the internal
state machine and the CAT9534’s registers are
initialized to their default state.
slave address
R/W
S 0 1 0 0 A2 A1 A0 0 A
acknowledge from slave
slave address
R/W
COMMAND BYTE
A S 0 1 0 0 A2 A1 A0 1 A
acknowledge from slave
acknowledge from slave
acknowledge
from master
data from register
DATA
A
first byte
At this moment master-transmitter becomes
master-receiver and slave-receiver
becomes slave-transmitter
no acknowledge
from master
data from register
DATA
last byte
NA P
Figure 10. Read from Register
SCL
123456 789
slave address
R/W
SDA S 0 1 0 0 A2 A1 A0 1 _A
start condition
acknowledge
from slave
READ FROM
PORT
DATA INTO
PORT
DATA 1
t_PH
data from port
DATA 1
A
acknowledge
from master
DATA 2
DATA 3
t_PS
data from port
DATA 4
no acknowledge
from master
NA P
stop
condition
DATA 4
INT
t_IV
t_IR
Figure 11. Read Input Port Register
© 2010 SCILLC. All rights reserved
11
Characteristics subject to change without notice
Doc. No. MD-9004 Rev. D