CAT6219-ADJTDGT3 Datasheet, PDF (10/11 Pages) ON Semiconductor – 500 mA CMOS LDO Regulator

CAT6219
PACKAGE DIMENSIONS
WDFN6 1.5x1.5, 0.5P
CASE 511BJ−01
ISSUE B
D
A
B
L
L1
PIN ONE
ÍÍÍÍ REFERENCE
ÍÍÍÍÍÍÍÍ _2X
0.10 C
2X
0.10 C _{TOP VIEW}
0.05 C
DETAIL B
DETAIL A
ALTERNATE TERMINAL
E
CONSTRUCTIONS
ÉÉÉÉÉÉ ÉÉÇÉÉÇ ^A3
EXPOSED Cu
MOLD CMPD
A1
A3
DETAIL B
ALTERNATE
CONSTRUCTIONS
A
0.05 C
NOTE 4
A1
SIDE VIEW
C
SEATING
PLANE
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.30mm FROM TERMINAL TIP.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
MILLIMETERS
DIM MIN MAX
A 0.70 0.80
A1 0.00 0.05
A3
0.20 REF
b 0.20 0.30
D
1.50 BSC
E
1.50 BSC
e
0.50 BSC
L 0.40 0.60
L1 --- 0.15
L2 0.50 0.70
GENERIC
MARKING DIAGRAM*
1
X MG
G
DETAIL A
1
L2
e
5X
L
3
6
4
BOTTOM VIEW
6X b
0.10 C A B
0.05 C NOTE 3
X = Specific Device Code
M = Date Code
G = Pb−Free Package
(*Note: Microdot may be in either location)
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
RECOMMENDED
MOUNTING FOOTPRINT*
6X 0.35
5X
0.73
1.80
0.83
0.50
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
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