NTMFS4921N Datasheet, PDF (1/7 Pages) ON Semiconductor – Power MOSFET 30 V, 58.5 A, Single N−Channel, SO−8 FL

NTMFS4921N
Power MOSFET
30 V, 58.5 A, Single N−Channel, SO−8 FL
Features
• Low R_DS(on) to Minimize Conduction Losses
• Low Capacitance to Minimize Driver Losses
• Optimized Gate Charge to Minimize Switching Losses
• Thermally Enhanced SO−8 Package
• These are Pb−Free Device
Applications
• CPU Power Delivery
• DC−DC Converters
• High Side Switching
MAXIMUM RATINGS (T_J = 25°C unless otherwise stated)
Parameter
Symbol Value Unit
Drain−to−Source Voltage
Gate−to−Source Voltage
Continuous Drain
Current R_qJA
(Note 1)
V_DSS
30
V
V_GS
±20
V
T_A = 25°C
I_D
13.8
A
T_A = 85°C
10
Power Dissipation
R_qJA (Note 1)
T_A = 25°C
P_D
2.14
W
Continuous Drain
Current R_qJA v
10 sec
T_A = 25°C
I_D
T_A = 85°C
22.4
A
16.1
Power Dissipation
T_A = 25°C
P_D
R_qJA, t v 10 sec
Steady
Continuous Drain
State _{TA = 25°C}
I_D
Current R_qJA
(Note 2)
T_A = 85°C
5.61
W
8.8
A
6.4
Power Dissipation
R_qJA (Note 2)
T_A = 25°C
P_D
0.87
W
Continuous Drain
Current R_qJC
(Note 1)
T_C = 25°C
I_D
T_C = 85°C
58.5
A
42.3
Power Dissipation
R_qJC (Note 1)
T_C = 25°C
P_D
Pulsed Drain
Current
t_p=10ms T_A = 25°C
I_DM
38.5
W
117
A
Current limited by package
T_A = 25°C
Operating Junction and Storage
Temperature
Source Current (Body Diode)
Drain to Source dV/dt
I_Dmaxpkg
T_J,
T_STG
I_S
dV/dt
100
−55 to
+150
38.5
6
A
°C
A
V/ns
Single Pulse Drain−to−Source Avalanche
Energy (V_DD = 50 V, V_GS = 10 V,
I_L = 24 A_pk, L = 0.3 mH, R_G = 25 W)
Lead Temperature for Soldering Purposes
(1/8” from case for 10 s)
EAS
T_L
86
mJ
260
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
http://onsemi.com
V_(BR)DSS
30 V
R_DS(ON) MAX
6.95 mW @ 10 V
10.8 mW @ 4.5 V
I_D MAX
58.5 A
D (5,6)
G (4)
S (1,2,3)
N−CHANNEL MOSFET
1
SO−8 FLAT LEAD
CASE 488AA
STYLE 1
MARKING
DIAGRAM
D
S
D
S ^4921N
S ^AYWWG
G
G
D
D
A
= Assembly Location
Y
= Year
WW = Work Week
G
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
Device
NTMFS4921NT1G
Package
SO−8FL
(Pb−Free)
Shipping^†
1500 /
Tape & Reel
NTMFS4921NT3G SO−8FL
(Pb−Free)
5000 /
Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
*For additional information on our Pb−Free strategy
and soldering details, please download the ON
Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2008
1
November, 2008 − Rev. 1
Publication Order Number:
NTMFS4921N/D