NTHS4101P_12 Datasheet, PDF (1/6 Pages) ON Semiconductor – Power MOSFET

NTHS4101P
Power MOSFET
−20 V, 6.7 A, P−Channel ChipFETt
Features
• Offers an Ultra Low R_DS(on) Solution in the ChipFET Package
• Miniature ChipFET Package 40% Smaller Footprint than TSOP−6
making it an Ideal Device for Applications where Board Space is at a
Premium
• Low Profile (<1.1 mm) Allows it to Fit Easily into Extremely Thin
Environments such as Portable Electronics
• Designed to Provide Low R_DS(on) at Gate Voltage as Low as 1.8 V, the
Operating Voltage used in many Logic ICs in Portable Electronics
• Simplifies Circuit Design since Additional Boost Circuits for Gate
Voltages are not Required
• Operated at Standard Logic Level Gate Drive, Facilitating Future
Migration to Lower Levels using the same Basic Topology
• Pb−Free Package is Available
Applications
• Optimized for Battery and Load Management Applications in
Portable Equipment such as MP3 Players, Cell Phones, Digital
Cameras, Personal Digital Assistant and other Portable Applications
• Charge Control in Battery Chargers
• Buck and Boost Converters
MAXIMUM RATINGS (T_J = 25°C unless otherwise noted)
Rating
Symbol Value Unit
Drain−to−Source Voltage
Gate−to−Source Voltage − Continuous
Drain Current − Continuous
− 5 seconds
Total Power Dissipation
Continuous @ T_A = 25°C
(5 sec) @ T_A = 25°C
Continuous @ 85°C
(5 sec) @ 85°C
V_DSS
V_GS
I_D
I_D
P_D
−20
Vdc
"8.0 _Vdc
−4.8
A
−6.7
W
1.3
2.5
0.7
1.3
Pulsed Drain Current − t_p = 10 ms
Operating Junction and Storage
Temperature Range
I_DM
−190
A
T_J, T_STG −55 to °C
+150
Continuous Source Current
Is
−4.8
A
Thermal Resistance (Note 1)
Junction−to−Ambient, 5 sec
Junction−to−Ambient, Continuous
Maximum Lead Temperature for Soldering
Purposes, 1/8″ from case for 10 seconds
R_qJA
R_qJA
T_L
°C/W
50
95
260
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.27 in sq
[1 oz] including traces).
http://onsemi.com
V_(BR)DSS
−20 V
R_DS(on) TYP
21 mW @ −4.5 V
30 mW @ −2.5 V
42 mW @ −1.8 V
S
I_D MAX
−6.7 A
G
D
P−Channel MOSFET
8
1
PIN
CONNECTIONS
ChipFET
CASE 1206A
STYLE 1
MARKING
DIAGRAM
D8
1D
1
8
D7
2D
2
7
D6
3D
3
6
S5
4G
4
5
C6 = Specific Device Code
M = Month Code
G = Pb−Free Package
ORDERING INFORMATION
Device
Package
Shipping^†
NTHS4101PT1 ChipFET 3000 Tape / Reel
NTHS4101PT1G
ChipFET
(Pb−free)
3000 Tape / Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2012
1
March, 2012 − Rev. 4
Publication Order Number:
NTHS4101P/D