NLX1G10 Datasheet, PDF (1/8 Pages) ON Semiconductor – 3-Input NAND Gate

NLX1G10
3-Input NAND Gate
The NLX1G10 is an advanced high−speed 3−input CMOS NAND
gate in ultra−small footprint.
The NLX1G10 input structures provide protection when voltages up
to 7.0 V are applied, regardless of the supply voltage.
Features
• High Speed: t_PD = 2.4 ns (Typ) @ V_CC = 5.0 V
• Designed for 1.65 V to 5.5 V V_CC Operation
• Low Power Dissipation: I_CC = 1 mA (Max) at T_A = 25°C
• 24 mA Balanced Output Source and Sink Capability
• Balanced Propagation Delays
• Overvoltage Tolerant (OVT) Input Pins
• Ultra−Small Packages
• These are Pb−Free Devices
A
1
6C
GND 2
5
V_CC
B
3
4Y
Figure 1. Pinout (Top View)
A
B
&
Y
C
Figure 2. Logic Symbol
http://onsemi.com
MARKING
DIAGRAMS
ULLGA6
1.0 x 1.0
CASE 613AD
M
G
1
ULLGA6
1.2 x 1.0
M
G
CASE 613AE
1
ULLGA6
1.45 x 1.0
CASE 613AF
M
G
1
X = Device Marking
M = Date Code
G = Pb−Free Package
PIN ASSIGNMENT
Pin
Function
1
A
2
GND
3
B
4
Y
5
V_CC
6
C
FUNCTION TABLE
Input
A
B
C
L
X
X
X
L
X
X
X
L
H
H
H
H − HIGH Logic Level
L − LOW Logic Level
X = Either LOW or HIGH Logic Level
Output
Y
H
H
H
L
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
© Semiconductor Components Industries, LLC, 2010
1
March, 2010 − Rev. 1
Publication Order Number:
NLX1G10/D