MTV16N50E Datasheet, PDF (1/10 Pages) Motorola, Inc – TMOS POWER FET 16 AMPERES 500 VOLTS RDS(on) = 0.40 OHM

MTV16N50E
Advance Information
TMOS E−FET.™
Power Field Effect
Transistor
D³PAK for Surface Mount
N−Channel Enhancement−Mode Silicon
Gate
This high voltage MOSFET uses an advanced termination scheme to
provide enhanced voltage−blocking capability without degrading
performance over time. In addition, this advanced TMOS E−FET is
designed to withstand high energy in the avalanche and commutation
modes. The new energy efficient design also offers a drain−to−source
diode with a fast recovery time. Designed for high speed switching
applications in power supplies, converters, PWM motor controls, these
devices are particularly well suited for bridge circuits where diode
speed and commutating safe operating areas are critical and offer
additional safety margin against unexpected voltage transients.
• Robust High Voltage Termination
• Avalanche Energy Specified
• Source−to−Drain Diode Recovery Time Comparable to a Discrete
Fast Recovery Diode
• Diode is Characterized for Use in Bridge Circuits
• I_DSS and V_DS(on) Specified at Elevated Temperature
http://onsemi.com
TMOS POWER FET
16 AMPERES, 500 VOLTS
R_DS(on) = 0.40 W
D³PAK Surface Mount
CASE 433−01
Style 2
D
N−Channel
®
G
S
MAXIMUM RATINGS (T_C = 25°C unless otherwise noted)
Rating
Drain−to−Source Voltage
Drain−to−Gate Voltage (R_GS = 1.0 MΩ)
Gate−to−Source Voltage — Continuous
Drain Current — Continuous
Drain Current — Continuous @ 100°C
Drain Current — Single Pulse (t_p ≤ 10 μs)
Total Power Dissipation
Derate above 25°C
Total Power Dissipation @ T_A = 25°C (1)
Operating and Storage Temperature Range
Single Pulse Drain−to−Source Avalanche Energy — Starting T_J = 25°C
(V_DD = 50 Vdc, V_GS = 10 Vdc, Peak I_L = 16 Apk, L = 6.7 mH, R_G = 25 Ω )
Thermal Resistance — Junction to Case
Thermal Resistance — Junction to Ambient
Thermal Resistance — Junction to Ambient (1)
Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 10 seconds
(1) When surface mounted to an FR4 board using the minimum recommended pad size.
This document contains information on a new product. Specifications and information
herein are subject to change without notice.
© Semiconductor Components Industries, LLC, 2006
1
August, 2006 − Rev. 1
Symbol
V_DSS
V_DGR
V_GS
I_D
I_D
I_DM
P_D
T_J, T_stg
E_AS
R_θJC
R_θJA
R_θJA
T_L
Value
500
500
±20
16
9.0
60
180
1.4
2.0
−55 to 150
860
0.7
62.5
35
260
Unit
Vdc
Vdc
Vdc
Adc
Apk
Watts
W/°C
Watts
°C
mJ
°C/W
°C
Publication Order Number:
MTV16N50E/D